upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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487 lines
13 KiB
487 lines
13 KiB
/*
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* (C) Copyright 2001
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* Denis Peter, MPL AG Switzerland
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*
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* TODO: clean-up
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <stdio_dev.h>
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#include "isa.h"
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#include "piix4_pci.h"
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#include "kbd.h"
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#include "video.h"
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#undef ISA_DEBUG
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#ifdef ISA_DEBUG
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#define PRINTF(fmt,args...) printf (fmt ,##args)
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#else
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#define PRINTF(fmt,args...)
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#endif
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#if defined(CONFIG_PIP405)
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extern int drv_isa_kbd_init (void);
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/* fdc (logical device 0) */
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const SIO_LOGDEV_TABLE sio_fdc[] = {
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{0x60, 3}, /* set IO to FDPort (3F0) */
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{0x61, 0xF0}, /* set IO to FDPort (3F0) */
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{0x70, 06}, /* set IRQ 6 for FDPort */
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{0x74, 02}, /* set DMA 2 for FDPort */
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{0xF0, 0x05}, /* set to PS2 type */
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{0xF1, 0x00}, /* default value */
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{0x30, 1}, /* and activate the device */
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{0xFF, 0} /* end of device table */
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};
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/* paralell port (logical device 3) */
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const SIO_LOGDEV_TABLE sio_pport[] = {
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{0x60, 3}, /* set IO to PPort (378) */
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{0x61, 0x78}, /* set IO to PPort (378) */
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{0x70, 07}, /* set IRQ 7 for PPort */
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{0xF1, 00}, /* set PPort to normal */
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{0x30, 1}, /* and activate the device */
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{0xFF, 0} /* end of device table */
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};
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/* paralell port (logical device 3) Floppy assigned to lpt */
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const SIO_LOGDEV_TABLE sio_pport_fdc[] = {
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{0x60, 3}, /* set IO to PPort (378) */
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{0x61, 0x78}, /* set IO to PPort (378) */
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{0x70, 07}, /* set IRQ 7 for PPort */
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{0xF1, 02}, /* set PPort to Floppy */
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{0x30, 1}, /* and activate the device */
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{0xFF, 0} /* end of device table */
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};
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/* uart 1 (logical device 4) */
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const SIO_LOGDEV_TABLE sio_com1[] = {
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{0x60, 3}, /* set IO to COM1 (3F8) */
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{0x61, 0xF8}, /* set IO to COM1 (3F8) */
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{0x70, 04}, /* set IRQ 4 for COM1 */
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{0x30, 1}, /* and activate the device */
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{0xFF, 0} /* end of device table */
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};
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/* uart 2 (logical device 5) */
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const SIO_LOGDEV_TABLE sio_com2[] = {
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{0x60, 2}, /* set IO to COM2 (2F8) */
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{0x61, 0xF8}, /* set IO to COM2 (2F8) */
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{0x70, 03}, /* set IRQ 3 for COM2 */
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{0x30, 1}, /* and activate the device */
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{0xFF, 0} /* end of device table */
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};
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/* keyboard controller (logical device 7) */
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const SIO_LOGDEV_TABLE sio_keyboard[] = {
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{0x70, 1}, /* set IRQ 1 for keyboard */
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{0x72, 12}, /* set IRQ 12 for mouse */
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{0xF0, 0}, /* disable Port92 (this is a PowerPC!!) */
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{0x30, 1}, /* and activate the device */
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{0xFF, 0} /* end of device table */
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};
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/*******************************************************************************
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* Config SuperIO FDC37C672
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********************************************************************************/
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unsigned char open_cfg_super_IO(int address)
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{
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out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x55); /* open config */
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out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x20); /* set address to DEV ID */
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if(in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 0x1)==0x40) /* ok Device ID is correct */
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return true;
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else
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return false;
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}
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void close_cfg_super_IO(int address)
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{
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out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0xAA); /* close config */
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}
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unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr)
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{
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/* assuming config reg is open */
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out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
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out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
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out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
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return in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1);
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}
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void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned char data)
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{
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/* assuming config reg is open */
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out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
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out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
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out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
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out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1,data); /* writes the data */
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}
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void isa_write_table(SIO_LOGDEV_TABLE *ldt,unsigned char ldev)
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{
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while (ldt->index != 0xFF) {
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write_cfg_super_IO(SIO_CFG_PORT, ldev, ldt->index, ldt->val);
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ldt++;
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} /* endwhile */
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}
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void isa_sio_loadtable(void)
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{
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char *s = getenv("floppy");
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/* setup Floppy device 0*/
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isa_write_table((SIO_LOGDEV_TABLE *)&sio_fdc,0);
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/* setup parallel port device 3 */
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if(s && !strncmp(s, "lpt", 3)) {
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printf("SIO: Floppy assigned to LPT\n");
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/* floppy is assigned to the LPT */
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isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport_fdc,3);
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}
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else {
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/*printf("Floppy assigned to internal port\n");*/
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isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport,3);
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}
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/* setup Com1 port device 4 */
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isa_write_table((SIO_LOGDEV_TABLE *)&sio_com1,4);
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/* setup Com2 port device 5 */
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isa_write_table((SIO_LOGDEV_TABLE *)&sio_com2,5);
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/* setup keyboards device 7 */
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isa_write_table((SIO_LOGDEV_TABLE *)&sio_keyboard,7);
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}
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void isa_sio_setup(void)
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{
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if (open_cfg_super_IO(SIO_CFG_PORT) == true)
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{
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isa_sio_loadtable();
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close_cfg_super_IO(0x3F0);
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}
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}
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#endif
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/******************************************************************************
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* IRQ Controller
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* we use the Vector mode
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*/
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struct isa_irq_action {
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interrupt_handler_t *handler;
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void *arg;
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int count;
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};
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static struct isa_irq_action isa_irqs[16];
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/*
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* This contains the irq mask for both 8259A irq controllers,
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*/
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static unsigned int cached_irq_mask = 0xfff9;
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#define cached_imr1 (unsigned char)cached_irq_mask
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#define cached_imr2 (unsigned char)(cached_irq_mask>>8)
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#define IMR_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_OCW1
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#define IMR_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_OCW1
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#define ICW1_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW1
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#define ICW1_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW1
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#define ICW2_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW2
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#define ICW2_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW2
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#define ICW3_1 ICW2_1
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#define ICW3_2 ICW2_2
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#define ICW4_1 ICW2_1
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#define ICW4_2 ICW2_2
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#define ISR_1 ICW1_1
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#define ISR_2 ICW1_2
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void disable_8259A_irq(unsigned int irq)
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{
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unsigned int mask = 1 << irq;
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cached_irq_mask |= mask;
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if (irq & 8)
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out8(IMR_2,cached_imr2);
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else
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out8(IMR_1,cached_imr1);
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}
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void enable_8259A_irq(unsigned int irq)
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{
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unsigned int mask = ~(1 << irq);
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cached_irq_mask &= mask;
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if (irq & 8)
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out8(IMR_2,cached_imr2);
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else
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out8(IMR_1,cached_imr1);
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}
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/*
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int i8259A_irq_pending(unsigned int irq)
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{
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unsigned int mask = 1<<irq;
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int ret;
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if (irq < 8)
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ret = inb(0x20) & mask;
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else
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ret = inb(0xA0) & (mask >> 8);
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spin_unlock_irqrestore(&i8259A_lock, flags);
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return ret;
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}
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*/
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/*
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* This function assumes to be called rarely. Switching between
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* 8259A registers is slow.
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*/
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int i8259A_irq_real(unsigned int irq)
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{
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int value;
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int irqmask = 1<<irq;
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if (irq < 8) {
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out8(ISR_1,0x0B); /* ISR register */
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value = in8(ISR_1) & irqmask;
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out8(ISR_1,0x0A); /* back to the IRR register */
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return value;
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}
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out8(ISR_2,0x0B); /* ISR register */
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value = in8(ISR_2) & (irqmask >> 8);
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out8(ISR_2,0x0A); /* back to the IRR register */
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return value;
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}
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/*
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* Careful! The 8259A is a fragile beast, it pretty
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* much _has_ to be done exactly like this (mask it
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* first, _then_ send the EOI, and the order of EOI
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* to the two 8259s is important!
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*/
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void mask_and_ack_8259A(unsigned int irq)
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{
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unsigned int irqmask = 1 << irq;
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unsigned int temp_irqmask = cached_irq_mask;
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/*
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* Lightweight spurious IRQ detection. We do not want
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* to overdo spurious IRQ handling - it's usually a sign
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* of hardware problems, so we only do the checks we can
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* do without slowing down good hardware unnecesserily.
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*
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* Note that IRQ7 and IRQ15 (the two spurious IRQs
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* usually resulting from the 8259A-1|2 PICs) occur
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* even if the IRQ is masked in the 8259A. Thus we
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* can check spurious 8259A IRQs without doing the
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* quite slow i8259A_irq_real() call for every IRQ.
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* This does not cover 100% of spurious interrupts,
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* but should be enough to warn the user that there
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* is something bad going on ...
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*/
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if (temp_irqmask & irqmask)
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goto spurious_8259A_irq;
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temp_irqmask |= irqmask;
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handle_real_irq:
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if (irq & 8) {
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in8(IMR_2); /* DUMMY - (do we need this?) */
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out8(IMR_2,(unsigned char)(temp_irqmask>>8));
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out8(ISR_2,0x60+(irq&7));/* 'Specific EOI' to slave */
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out8(ISR_1,0x62); /* 'Specific EOI' to master-IRQ2 */
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out8(IMR_2,cached_imr2); /* turn it on again */
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} else {
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in8(IMR_1); /* DUMMY - (do we need this?) */
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out8(IMR_1,(unsigned char)temp_irqmask);
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out8(ISR_1,0x60+irq); /* 'Specific EOI' to master */
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out8(IMR_1,cached_imr1); /* turn it on again */
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}
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return;
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spurious_8259A_irq:
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/*
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* this is the slow path - should happen rarely.
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*/
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if (i8259A_irq_real(irq))
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/*
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* oops, the IRQ _is_ in service according to the
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* 8259A - not spurious, go handle it.
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*/
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goto handle_real_irq;
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{
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static int spurious_irq_mask;
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/*
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* At this point we can be sure the IRQ is spurious,
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* lets ACK and report it. [once per IRQ]
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*/
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if (!(spurious_irq_mask & irqmask)) {
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PRINTF("spurious 8259A interrupt: IRQ%d.\n", irq);
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spurious_irq_mask |= irqmask;
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}
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/* irq_err_count++; */
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/*
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* Theoretically we do not have to handle this IRQ,
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* but in Linux this does not cause problems and is
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* simpler for us.
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*/
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goto handle_real_irq;
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}
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}
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void init_8259A(void)
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{
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out8(IMR_1,0xff); /* mask all of 8259A-1 */
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out8(IMR_2,0xff); /* mask all of 8259A-2 */
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out8(ICW1_1,0x11); /* ICW1: select 8259A-1 init */
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out8(ICW2_1,0x20 + 0); /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
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out8(ICW3_1,0x04); /* 8259A-1 (the master) has a slave on IR2 */
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out8(ICW4_1,0x01); /* master expects normal EOI */
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out8(ICW1_2,0x11); /* ICW2: select 8259A-2 init */
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out8(ICW2_2,0x20 + 8); /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
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out8(ICW3_2,0x02); /* 8259A-2 is a slave on master's IR2 */
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out8(ICW4_2,0x01); /* (slave's support for AEOI in flat mode
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is to be investigated) */
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udelay(10000); /* wait for 8259A to initialize */
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out8(IMR_1,cached_imr1); /* restore master IRQ mask */
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udelay(10000); /* wait for 8259A to initialize */
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out8(IMR_2,cached_imr2); /* restore slave IRQ mask */
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}
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#define PCI_INT_ACK_ADDR 0xEED00000
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int handle_isa_int(void)
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{
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unsigned long irqack;
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unsigned char irq;
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/* first we acknokledge the int via the PCI bus */
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irqack=in32(PCI_INT_ACK_ADDR);
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/* now we get the ISRs */
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in8(ISR_2);
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in8(ISR_1);
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irq=(unsigned char)irqack;
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irq-=32;
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/* if((irq==7)&&((isr1&0x80)==0)) {
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PRINTF("IRQ7 detected but not in ISR\n");
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}
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else {
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*/ /* we should handle cascaded interrupts here also */
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{
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/* printf("ISA Irq %d\n",irq); */
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isa_irqs[irq].count++;
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if(irq!=2) { /* just swallow the cascade irq 2 */
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if (isa_irqs[irq].handler != NULL)
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(*isa_irqs[irq].handler)(isa_irqs[irq].arg); /* call isr */
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else {
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PRINTF ("bogus interrupt vector 0x%x\n", irq);
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}
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}
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}
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/* issue EOI instruction to clear the IRQ */
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mask_and_ack_8259A(irq);
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return 0;
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}
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/******************************************************************
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* Install and free an ISA interrupt handler.
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*/
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void isa_irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
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{
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if (isa_irqs[vec].handler != NULL) {
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printf ("ISA Interrupt vector %d: handler 0x%x replacing 0x%x\n",
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vec, (uint)handler, (uint)isa_irqs[vec].handler);
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}
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isa_irqs[vec].handler = handler;
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isa_irqs[vec].arg = arg;
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enable_8259A_irq(vec);
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PRINTF ("Install ISA IRQ %d ==> %p, @ %p mask=%04x\n", vec, handler, &isa_irqs[vec].handler,cached_irq_mask);
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}
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void isa_irq_free_handler(int vec)
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{
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disable_8259A_irq(vec);
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isa_irqs[vec].handler = NULL;
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isa_irqs[vec].arg = NULL;
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PRINTF ("Free ISA IRQ %d mask=%04x\n", vec, cached_irq_mask);
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}
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/****************************************************************************/
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void isa_init_irq_contr(void)
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{
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int i;
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/* disable all Interrupts */
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/* first write icws controller 1 */
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for(i=0;i<16;i++)
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{
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isa_irqs[i].handler=NULL;
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isa_irqs[i].arg=NULL;
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isa_irqs[i].count=0;
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}
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init_8259A();
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out8(IMR_2,0xFF);
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}
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/*************************************************************************/
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void isa_show_irq(void)
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{
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int vec;
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printf ("\nISA Interrupt-Information:\n");
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printf ("Nr Routine Arg Count\n");
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for (vec=0; vec<16; vec++) {
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if (isa_irqs[vec].handler != NULL) {
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printf ("%02d %08lx %08lx %d\n",
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vec,
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(ulong)isa_irqs[vec].handler,
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(ulong)isa_irqs[vec].arg,
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isa_irqs[vec].count);
|
|
}
|
|
}
|
|
}
|
|
|
|
int isa_irq_get_count(int vec)
|
|
{
|
|
return(isa_irqs[vec].count);
|
|
}
|
|
|
|
/******************************************************************
|
|
* Init the ISA bus and devices.
|
|
*/
|
|
|
|
#if defined(CONFIG_PIP405)
|
|
|
|
int isa_init(void)
|
|
{
|
|
isa_sio_setup();
|
|
isa_init_irq_contr();
|
|
drv_isa_kbd_init();
|
|
return 0;
|
|
}
|
|
#endif
|
|
|