upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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95 lines
2.6 KiB
95 lines
2.6 KiB
/*
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* Copyright 2009 Extreme Engineering Solutions, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/fsl_ddr_sdram.h>
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#include <asm/mmu.h>
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#include <asm/io.h>
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#include <fdt_support.h>
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#include <pca953x.h>
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#include "../common/fsl_8xxx_misc.h"
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#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_PCI)
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extern void ft_board_pci_setup(void *blob, bd_t *bd);
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#endif
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/*
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* Print out which flash was booted from and if booting from the 2nd flash,
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* swap flash chip selects to maintain consistent flash numbering/addresses.
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*/
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static void flash_cs_fixup(void)
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{
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int flash_sel;
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/*
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* Print boot dev and swap flash flash chip selects if booted from 2nd
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* flash. Swapping chip selects presents user with a common memory
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* map regardless of which flash was booted from.
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*/
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flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) &
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CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS));
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printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1);
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if (flash_sel) {
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set_lbc_br(0, CONFIG_SYS_BR1_PRELIM);
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set_lbc_or(0, CONFIG_SYS_OR1_PRELIM);
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set_lbc_br(1, CONFIG_SYS_BR0_PRELIM);
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set_lbc_or(1, CONFIG_SYS_OR0_PRELIM);
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}
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}
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int board_early_init_r(void)
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{
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/* Initialize PCA9557 devices */
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pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0);
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pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0);
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pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR2, 0xff, 0);
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pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR3, 0xff, 0);
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flash_cs_fixup();
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return 0;
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}
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phys_size_t initdram(int board_type)
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{
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phys_size_t dram_size = fsl_ddr_sdram();
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#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
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/* Initialize and enable DDR ECC */
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ddr_enable_ecc(dram_size);
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#endif
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return dram_size;
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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void ft_board_setup(void *blob, bd_t *bd)
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{
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#ifdef CONFIG_PCI
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ft_board_pci_setup(blob, bd);
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#endif
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ft_cpu_setup(blob, bd);
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}
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#endif
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