upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Paul Burton d8b326976a MIPS: Clear instruction hazards in flush_cache() ... When writing code, for example during relocation, we ensure that the icache has a coherent view of the new instructions with a call to flush_cache(). This handles the bulk of the work to ensure the new instructions will execute as expected, however it does not ensure that the CPU pipeline doesn't already contain instructions taken from a stale view of the affected memory. This could theoretically be a problem for relocation, but in practice typically isn't because we sync caches for enough code after the entry point of the newly written code that by the time the CPU pipeline might possibly fetch any of it we'll have long ago written it back & invalidated any stale icache entries. This is however a problem for shorter regions of code. In preparation for later patches which write shorter segments of code, ensure any instruction hazards are cleared by flush_cache() by introducing & using a new instruction_hazard_barrier() function which makes use of the jr.hb instruction to clear the hazard. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: u-boot@lists.denx.de		7 years ago
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mach-generic	…
addrspace.h	…
asm-offsets.h	MIPS: add asm-offsets for struct pt_regs	8 years ago
asm.h	…
bitops.h	…
byteorder.h	…
cache.h	mips: Let cache.h be included from assembly source	8 years ago
cachectl.h	…
cacheops.h	MIPS: fix mips_cache fallback without __builtin_mips_cache	8 years ago
cm.h	MIPS: Join the coherent domain when a CM is present	8 years ago
config.h	…
const.h	mips: Use common _AC macro now.	8 years ago
cpu-features.h	…
global_data.h	MIPS: L2 cache support	8 years ago
gpio.h	…
io.h	mips: Use asm-generic/io.h	7 years ago
isadep.h	…
linkage.h	efi: Use asmlinkage for EFIAPI	8 years ago
malta.h	…
mipsregs.h	MIPS: fix iand optimize setup of CP0 registers	8 years ago
pgtable-bits.h	…
posix_types.h	…
processor.h	…
ptrace.h	…
reboot.h	…
reg.h	…
regdef.h	…
relocs.h	MIPS: Stop building position independent code	7 years ago
sections.h	MIPS: Stop building position independent code	7 years ago
sgidefs.h	…
string.h	…
system.h	MIPS: Clear instruction hazards in flush_cache()	7 years ago
types.h	…
u-boot-mips.h	MIPS: add handling for generic and EJTAG exceptions	8 years ago
u-boot.h	mips: Make u-boot-mips.h a private header	7 years ago
unaligned.h	…