upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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197 lines
6.0 KiB
197 lines
6.0 KiB
/*
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* (C) Copyright 2004
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* Texas Instruments.
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* Kshitij Gupta <kshitij@ti.com>
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* Configuration settings for the TI OMAP 1610 H2 board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
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#define CONFIG_OMAP 1 /* in a TI OMAP core */
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#define CONFIG_OMAP1610 1 /* which is in a 1610 */
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#define CONFIG_H2_OMAP1610 1 /* on an H2 Board */
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#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_H2
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/* input clock of PLL */
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/* the OMAP1610 H2 has 12MHz input clock */
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#define CONFIG_SYS_CLK_FREQ 12000000
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_MISC_INIT_R
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
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/*
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* Hardware drivers
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*/
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#define CONFIG_LAN91C96
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#define CONFIG_LAN91C96_BASE 0x04000300
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#define CONFIG_LAN91C96_EXT_PHY
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
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#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart */
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/*
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* select serial console configuration
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*/
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#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 H2 */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_DHCP
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_BOOTPATH
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#include <configs/omap1510.h>
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=dhcp"
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#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
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#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
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#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "OMAP1610 H2 # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
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/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
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* DPLL1. This time is further subdivided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
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#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
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#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
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#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */
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#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */
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#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */
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#ifndef __ASSEMBLY__
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extern unsigned long omap_flash_base; /* set in flash__init */
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#endif
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#define CONFIG_SYS_FLASH_BASE omap_flash_base
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#elif defined(CONFIG_CS0_BOOT)
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM0
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#else
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM1
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#endif
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#define PHYS_SRAM 0x20000000
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
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#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
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/* addr of environment */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
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#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
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#endif /* __CONFIG_H */
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