upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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238 lines
6.6 KiB
238 lines
6.6 KiB
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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* Gary Jennejohn <garyj@denx.de>
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* David Mueller <d.mueller@elsoft.ch>
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*
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* Configuation settings for the SAMSUNG SMDK2410 board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_ARM920T /* This is an ARM920T Core */
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#define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */
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#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
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#define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */
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#define CONFIG_SYS_TEXT_BASE 0x0
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#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
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/* input clock of PLL (the SMDK2410 has 12MHz input clock) */
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#define CONFIG_SYS_CLK_FREQ 12000000
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/*
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* Hardware drivers
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*/
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#define CONFIG_CS8900 /* we have a CS8900 on-board */
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#define CONFIG_CS8900_BASE 0x19000300
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#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
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/*
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* select serial console configuration
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*/
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#define CONFIG_S3C24X0_SERIAL
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#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
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/************************************************************
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* USB support (currently only works with D-cache off)
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************************************************************/
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#define CONFIG_USB_OHCI
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#define CONFIG_USB_KEYBOARD
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#define CONFIG_USB_STORAGE
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#define CONFIG_DOS_PARTITION
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/************************************************************
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* RTC
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************************************************************/
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#define CONFIG_RTC_S3C24X0
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#define CONFIG_BAUDRATE 115200
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_BSP
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_USB
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_CMDLINE_EDITING
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/* autoboot */
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_BOOT_RETRY_TIME -1
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#define CONFIG_RESET_TO_RETRY
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 10.0.0.110
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#define CONFIG_SERVERIP 10.0.0.1
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
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/* what's this ? it's not used anywhere */
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "SMDK2410 # "
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#define CONFIG_SYS_CBSIZE 256
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* may be activated as soon as s3c24x0 has print_cpuinfo support */
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/*#define CONFIG_DISPLAY_CPUINFO*/ /* Display cpu info */
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#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0x30800000
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#define CONFIG_SYS_HZ 1000
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/* support additional compression methods */
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#define CONFIG_BZIP2
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#define CONFIG_LZO
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#define CONFIG_LZMA
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #0 */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_FLASH_CFI_LEGACY
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#define CONFIG_SYS_FLASH_LEGACY_512Kx16
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
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#define CONFIG_SYS_MAX_FLASH_SECT (19)
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_SIZE 0x10000
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/*
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* Size of malloc() pool
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* BZIP2 / LZO / LZMA need a lot of RAM
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*/
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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#define CONFIG_SYS_MONITOR_LEN (448 * 1024)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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/*
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* NAND configuration
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*/
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_S3C2410
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#define CONFIG_SYS_S3C2410_NAND_HWECC
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define NAND_MAX_CHIPS 1
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#define CONFIG_SYS_NAND_BASE 0x4E000000
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#endif
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/*
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* File system
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*/
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_YAFFS2
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#define CONFIG_RBTREE
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/* additions for new relocation code, must be added to all boards */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_BOARD_EARLY_INIT_F
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#endif /* __CONFIG_H */
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