upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/doc/README.generic_usb_ohci

1.4 KiB

Notes on the the generic USB-OHCI driver
========================================

This driver (drivers/usb_ohci.[ch]) is the result of the merge of
various existing OHCI drivers that were basically identical beside
cpu/board dependant initalization. This initalization has been moved
into cpu/board directories and are called via the hooks below.

Configuration options
----------------------

CONFIG_USB_OHCI_NEW: enable the new OHCI driver

CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks:

- extern int usb_board_init(void);
- extern int usb_board_stop(void);
- extern int usb_cpu_init_fail(void);

CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks:

- extern int usb_cpu_init(void);
- extern int usb_cpu_stop(void);
- extern int usb_cpu_init_fail(void);

CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI
registers

CFG_USB_OHCI_SLOT_NAME: slot name

CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the
root hub.


Endianness issues
------------------

The USB bus operates in little endian, but unfortunately there are
OHCI controllers that operate in big endian such as ppc4xx and
mpc5xxx. For these the config option

CFG_OHCI_BE_CONTROLLER

needs to be defined.


PCI Controllers
----------------

You'll need to define

CONFIG_PCI_OHCI

PCI Controllers need to do byte swapping on register accesses, so they
should to define:

CFG_OHCI_SWAP_REG_ACCESS