upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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136 lines
3.2 KiB
136 lines
3.2 KiB
/*
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* (C) Copyright 2007
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* Michael Schwingen, michael@schwingen.org
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*
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* (C) Copyright 2006
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* (C) Copyright 2002
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <malloc.h>
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#include <asm/arch/ixp425.h>
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#include <asm/io.h>
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#include <miiphy.h>
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#include "actux2_hw.h"
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DECLARE_GLOBAL_DATA_PTR;
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int board_init (void)
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{
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gd->bd->bi_arch_number = MACH_TYPE_ACTUX2;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0x00000100;
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GPIO_OUTPUT_ENABLE (CFG_GPIO_IORST);
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GPIO_OUTPUT_ENABLE (CFG_GPIO_ETHRST);
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GPIO_OUTPUT_ENABLE (CFG_GPIO_DSR);
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GPIO_OUTPUT_ENABLE (CFG_GPIO_DCD);
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GPIO_OUTPUT_CLEAR (CFG_GPIO_IORST);
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GPIO_OUTPUT_CLEAR (CFG_GPIO_ETHRST);
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GPIO_OUTPUT_CLEAR (CFG_GPIO_DSR);
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GPIO_OUTPUT_SET (CFG_GPIO_DCD);
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/* Setup GPIO's for Interrupt inputs */
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GPIO_OUTPUT_DISABLE (CFG_GPIO_DBGINT);
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GPIO_OUTPUT_DISABLE (CFG_GPIO_ETHINT);
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/* Setup GPIO's for 33MHz clock output */
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GPIO_OUTPUT_ENABLE (CFG_GPIO_PCI_CLK);
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GPIO_OUTPUT_ENABLE (CFG_GPIO_EXTBUS_CLK);
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*IXP425_GPIO_GPCLKR = 0x011001FF;
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/* CS1: IPAC-X */
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*IXP425_EXP_CS1 = 0x94d10013;
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/* CS5: Debug port */
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*IXP425_EXP_CS5 = 0x9d520003;
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/* CS6: HW release register */
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*IXP425_EXP_CS6 = 0x81860001;
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/* CS7: LEDs */
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*IXP425_EXP_CS7 = 0x80900003;
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udelay (533);
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GPIO_OUTPUT_SET (CFG_GPIO_IORST);
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GPIO_OUTPUT_SET (CFG_GPIO_ETHRST);
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ACTUX2_LED1 (1);
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ACTUX2_LED2 (0);
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ACTUX2_LED3 (0);
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ACTUX2_LED4 (0);
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return 0;
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}
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/*
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* Check Board Identity
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*/
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int checkboard (void)
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{
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char *s = getenv ("serial#");
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puts ("Board: AcTux-2 rev.");
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putc (ACTUX2_BOARDREL + 'A' - 1);
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if (s != NULL) {
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puts (", serial# ");
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puts (s);
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}
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putc ('\n');
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return (0);
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}
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return (0);
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}
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/*************************************************************************
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* get_board_rev() - setup to pass kernel board revision information
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* 0 = reserved
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* 1 = Rev. A
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* 2 = Rev. B
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*************************************************************************/
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u32 get_board_rev (void)
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{
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return ACTUX2_BOARDREL;
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}
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void reset_phy (void)
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{
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/* init IcPlus IP175C ethernet switch to native IP175C mode */
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miiphy_write ("NPE0", 29, 31, 0x175C);
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}
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