upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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373 lines
9.8 KiB
373 lines
9.8 KiB
/*
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* (C) Copyright 2006
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* (C) Copyright 2003-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2004
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* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
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*
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* (C) Copyright 2004
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* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc5xxx.h>
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#include <pci.h>
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#include <malloc.h>
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/* some SIMPLE GPIO Pins */
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#define GPIO_USB_8 (31-12)
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#define GPIO_USB_7 (31-13)
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#define GPIO_USB_6 (31-14)
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#define GPIO_USB_0 (31-15)
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#define GPIO_PSC3_7 (31-18)
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#define GPIO_PSC3_6 (31-19)
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#define GPIO_PSC3_1 (31-22)
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#define GPIO_PSC3_0 (31-23)
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/* some simple Interrupt GPIO Pins */
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#define GPIO_PSC3_8 2
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#define GPIO_USB1_9 3
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#define GPT_OUT_0 0x00000027
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#define GPT_OUT_1 0x00000037
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#define GPT_DISABLE 0x00000000 /* GPT pin disabled */
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#define GP_SIMP_ENABLE_O(n, v) {pgpio->simple_dvo |= (v << n); \
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pgpio->simple_ddr |= (1 << n); \
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pgpio->simple_gpioe |= (1 << n); \
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}
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#define GP_SIMP_ENABLE_I(n) { pgpio->simple_ddr |= ~(1 << n); \
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pgpio->simple_gpioe |= (1 << n); \
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}
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#define GP_SIMP_SET_O(n, v) (pgpio->simple_dvo = v ? \
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(pgpio->simple_dvo | (1 << n)) : \
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(pgpio->simple_dvo & ~(1 << n)) )
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#define GP_SIMP_GET_O(n) ((pgpio->simple_dvo >> n) & 1)
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#define GP_SIMP_GET_I(n) ((pgpio->simple_ival >> n) & 1)
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#define GP_SINT_SET_O(n, v) (pgpio->sint_dvo = v ? \
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(pgpio->sint_dvo | (1 << n)) : \
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(pgpio->sint_dvo & ~(1 << n)) )
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#define GP_SINT_ENABLE_O(n, v) {pgpio->sint_ode &= ~(1 << n); \
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pgpio->sint_ddr |= (1 << n); \
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GP_SINT_SET_O(n, v); \
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pgpio->sint_gpioe |= (1 << n); \
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}
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#define GP_SINT_ENABLE_I(n) { pgpio->sint_ddr |= ~(1 << n); \
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pgpio->sint_gpioe |= (1 << n); \
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}
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#define GP_SINT_GET_O(n) ((pgpio->sint_ival >> n) & 1)
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#define GP_SINT_GET_I(n) ((pgpio-ntt_ival >> n) & 1)
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#define GP_TIMER_ENABLE_O(n, v) ( \
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((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->emsr = v ? \
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GPT_OUT_1 : \
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GPT_OUT_0 )
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#define GP_TIMER_SET_O(n, v) GP_TIMER_ENABLE_O(n, v)
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#define GP_TIMER_GET_O(n, v) ( \
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(((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->emsr & 0x10) >> 4)
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#define GP_TIMER_GET_I(n, v) ( \
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(((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->sr & 0x100) >> 8)
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#ifndef CFG_RAMBOOT
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static void sdram_start (int hi_addr)
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{
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long hi_addr_bit = hi_addr ? 0x01000000 : 0;
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/* unlock mode register */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
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__asm__ volatile ("sync");
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/* precharge all banks */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
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__asm__ volatile ("sync");
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#if SDRAM_DDR
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/* set mode register: extended mode */
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*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
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__asm__ volatile ("sync");
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/* set mode register: reset DLL */
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*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
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__asm__ volatile ("sync");
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#endif
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/* precharge all banks */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
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__asm__ volatile ("sync");
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/* auto refresh */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
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__asm__ volatile ("sync");
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/* set mode register */
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*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
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__asm__ volatile ("sync");
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/* normal operation */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
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__asm__ volatile ("sync");
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}
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#endif
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/*
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* ATTENTION: Although partially referenced initdram does NOT make real use
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* use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
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* is something else than 0x00000000.
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*/
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phys_size_t initdram (int board_type)
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{
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ulong dramsize = 0;
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#ifndef CFG_RAMBOOT
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ulong test1, test2;
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/* setup SDRAM chip selects */
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */
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*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x40000000; /* disabled */
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__asm__ volatile ("sync");
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/* setup config registers */
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*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
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*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
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__asm__ volatile ("sync");
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#if SDRAM_DDR
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/* set tap delay */
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*(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
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__asm__ volatile ("sync");
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#endif
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/* find RAM size using SDRAM CS0 only */
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sdram_start(0);
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test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x20000000);
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sdram_start(1);
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test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x20000000);
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if (test1 > test2) {
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sdram_start(0);
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dramsize = test1;
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} else {
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dramsize = test2;
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}
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/* memory smaller than 1MB is impossible */
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if (dramsize < (1 << 20)) {
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dramsize = 0;
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}
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/* set SDRAM CS0 size according to the amount of RAM found */
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if (dramsize > 0) {
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
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__builtin_ffs(dramsize >> 20) - 1;
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} else {
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
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}
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*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
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#else /* CFG_RAMBOOT */
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/* retrieve size of memory connected to SDRAM CS0 */
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dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
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if (dramsize >= 0x13) {
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dramsize = (1 << (dramsize - 0x13)) << 20;
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} else {
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dramsize = 0;
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}
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/* retrieve size of memory connected to SDRAM CS1 */
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dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
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if (dramsize2 >= 0x13) {
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dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
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} else {
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dramsize2 = 0;
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}
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#endif /* CFG_RAMBOOT */
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/* return dramsize + dramsize2; */
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return dramsize;
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}
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int checkboard (void)
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{
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puts ("Board: MAN UC101\n");
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/* clear the Display */
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*(char *)(CFG_DISP_CWORD) = 0x80;
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return 0;
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}
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static void init_ports (void)
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{
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volatile struct mpc5xxx_gpio *pgpio =
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(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
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GP_SIMP_ENABLE_I(GPIO_USB_8); /* HEX Bit 3 */
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GP_SIMP_ENABLE_I(GPIO_USB_7); /* HEX Bit 2 */
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GP_SIMP_ENABLE_I(GPIO_USB_6); /* HEX Bit 1 */
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GP_SIMP_ENABLE_I(GPIO_USB_0); /* HEX Bit 0 */
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GP_SIMP_ENABLE_I(GPIO_PSC3_0); /* Switch Menue A */
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GP_SIMP_ENABLE_I(GPIO_PSC3_1); /* Switch Menue B */
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GP_SIMP_ENABLE_I(GPIO_PSC3_6); /* Switch Cold_Warm */
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GP_SIMP_ENABLE_I(GPIO_PSC3_7); /* Switch Restart */
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GP_SINT_ENABLE_O(GPIO_PSC3_8, 0); /* LED H2 */
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GP_SINT_ENABLE_O(GPIO_USB1_9, 0); /* LED H3 */
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GP_TIMER_ENABLE_O(4, 0); /* LED H4 */
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GP_TIMER_ENABLE_O(5, 0); /* LED H5 */
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GP_TIMER_ENABLE_O(3, 0); /* LED HB */
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GP_TIMER_ENABLE_O(1, 0); /* RES_COLDSTART */
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}
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#ifdef CONFIG_PREBOOT
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static uchar kbd_magic_prefix[] = "key_magic";
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static uchar kbd_command_prefix[] = "key_cmd";
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struct kbd_data_t {
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char s1;
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};
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struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
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{
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volatile struct mpc5xxx_gpio *pgpio =
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(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
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kbd_data->s1 = GP_SIMP_GET_I(GPIO_USB_8) << 3 | \
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GP_SIMP_GET_I(GPIO_USB_7) << 2 | \
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GP_SIMP_GET_I(GPIO_USB_6) << 1 | \
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GP_SIMP_GET_I(GPIO_USB_0) << 0;
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return kbd_data;
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}
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static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
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{
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char s1 = str[0];
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if (s1 >= '0' && s1 <= '9')
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s1 -= '0';
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else if (s1 >= 'a' && s1 <= 'f')
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s1 = s1 - 'a' + 10;
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else if (s1 >= 'A' && s1 <= 'F')
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s1 = s1 - 'A' + 10;
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else
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return -1;
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if (s1 != kbd_data->s1) return -1;
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return 0;
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}
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static char *key_match (const struct kbd_data_t *kbd_data)
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{
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char magic[sizeof (kbd_magic_prefix) + 1];
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char *suffix;
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char *kbd_magic_keys;
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/*
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* The following string defines the characters that can be appended
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* to "key_magic" to form the names of environment variables that
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* hold "magic" key codes, i. e. such key codes that can cause
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* pre-boot actions. If the string is empty (""), then only
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* "key_magic" is checked (old behaviour); the string "125" causes
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* checks for "key_magic1", "key_magic2" and "key_magic5", etc.
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*/
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if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
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kbd_magic_keys = "";
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/* loop over all magic keys;
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* use '\0' suffix in case of empty string
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*/
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for (suffix = kbd_magic_keys; *suffix ||
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suffix == kbd_magic_keys; ++suffix) {
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sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
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if (compare_magic(kbd_data, getenv(magic)) == 0) {
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char cmd_name[sizeof (kbd_command_prefix) + 1];
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char *cmd;
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sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
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cmd = getenv (cmd_name);
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return (cmd);
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}
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}
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return (NULL);
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}
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#endif /* CONFIG_PREBOOT */
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int misc_init_r (void)
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{
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/* Init the I/O ports */
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init_ports ();
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#ifdef CONFIG_PREBOOT
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struct kbd_data_t kbd_data;
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/* Decode keys */
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char *str = strdup (key_match (get_keys (&kbd_data)));
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/* Set or delete definition */
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setenv ("preboot", str);
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free (str);
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#endif /* CONFIG_PREBOOT */
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return 0;
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}
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int board_early_init_r (void)
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{
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*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
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*(vu_long *)MPC5XXX_BOOTCS_START =
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*(vu_long *)MPC5XXX_CS0_START = START_REG(CFG_FLASH_BASE);
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*(vu_long *)MPC5XXX_BOOTCS_STOP =
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*(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CFG_FLASH_BASE, CFG_FLASH_SIZE);
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/* Interbus enable it here ?? */
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*(vu_long *)MPC5XXX_GPT6_ENABLE = GPT_OUT_1;
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return 0;
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}
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#ifdef CONFIG_PCI
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static struct pci_controller hose;
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extern void pci_mpc5xxx_init(struct pci_controller *);
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void pci_init_board(void)
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{
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pci_mpc5xxx_init(&hose);
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}
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#endif
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#if defined(CONFIG_HW_WATCHDOG)
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void hw_watchdog_reset(void)
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{
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/* Trigger HW Watchdog with TIMER_0 */
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*(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_1;
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*(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_0;
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}
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#endif
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