upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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1028 lines
24 KiB
1028 lines
24 KiB
/*
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* (C) Copyright 2000-2011
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <malloc.h>
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#include <stdio_dev.h>
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#ifdef CONFIG_8xx
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#include <mpc8xx.h>
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#endif
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#ifdef CONFIG_5xx
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#include <mpc5xx.h>
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#endif
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#ifdef CONFIG_MPC5xxx
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#include <mpc5xxx.h>
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#endif
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#if defined(CONFIG_CMD_IDE)
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#include <ide.h>
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#endif
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#if defined(CONFIG_CMD_SCSI)
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#include <scsi.h>
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#endif
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#if defined(CONFIG_CMD_KGDB)
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#include <kgdb.h>
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#endif
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#ifdef CONFIG_STATUS_LED
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#include <status_led.h>
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#endif
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#include <net.h>
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#ifdef CONFIG_GENERIC_MMC
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#include <mmc.h>
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#endif
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#include <serial.h>
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#ifdef CONFIG_SYS_ALLOC_DPRAM
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#if !defined(CONFIG_CPM2)
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#include <commproc.h>
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#endif
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#endif
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#include <version.h>
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#if defined(CONFIG_BAB7xx)
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#include <w83c553f.h>
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#endif
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#include <dtt.h>
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#if defined(CONFIG_POST)
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#include <post.h>
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#endif
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#if defined(CONFIG_LOGBUFFER)
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#include <logbuff.h>
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#endif
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#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
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#include <asm/cache.h>
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#endif
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#ifdef CONFIG_PS2KBD
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#include <keyboard.h>
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#endif
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#ifdef CONFIG_ADDR_MAP
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#include <asm/mmu.h>
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#endif
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#ifdef CONFIG_MP
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#include <asm/mp.h>
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#endif
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#ifdef CONFIG_BITBANGMII
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#include <miiphy.h>
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#endif
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#ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
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extern int update_flash_size(int flash_size);
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#endif
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#if defined(CONFIG_SC3)
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extern void sc3_read_eeprom(void);
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#endif
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#if defined(CONFIG_CMD_DOC)
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void doc_init(void);
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#endif
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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#include <i2c.h>
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#endif
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#include <spi.h>
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#include <nand.h>
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static char *failed = "*** failed ***\n";
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#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
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extern flash_info_t flash_info[];
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#endif
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#if defined(CONFIG_START_IDE)
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extern int board_start_ide(void);
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#endif
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#include <environment.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if !defined(CONFIG_SYS_MEM_TOP_HIDE)
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#define CONFIG_SYS_MEM_TOP_HIDE 0
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#endif
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extern ulong __init_end;
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extern ulong __bss_end;
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ulong monitor_flash_len;
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#if defined(CONFIG_CMD_BEDBUG)
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#include <bedbug/type.h>
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#endif
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/*
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* Utilities
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*/
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/*
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* All attempts to come up with a "common" initialization sequence
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* that works for all boards and architectures failed: some of the
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* requirements are just _too_ different. To get rid of the resulting
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* mess of board dependend #ifdef'ed code we now make the whole
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* initialization sequence configurable to the user.
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*
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* The requirements for any new initalization function is simple: it
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* receives a pointer to the "global data" structure as it's only
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* argument, and returns an integer return code, where 0 means
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* "continue" and != 0 means "fatal error, hang the system".
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*/
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typedef int (init_fnc_t)(void);
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/*
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* Init Utilities
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*
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* Some of this code should be moved into the core functions,
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* but let's get it working (again) first...
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*/
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static int init_baudrate(void)
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{
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gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
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return 0;
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}
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/***********************************************************************/
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static void __board_add_ram_info(int use_default)
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{
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/* please define platform specific board_add_ram_info() */
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}
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void board_add_ram_info(int)
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__attribute__ ((weak, alias("__board_add_ram_info")));
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static int __board_flash_wp_on(void)
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{
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/*
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* Most flashes can't be detected when write protection is enabled,
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* so provide a way to let U-Boot gracefully ignore write protected
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* devices.
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*/
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return 0;
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}
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int board_flash_wp_on(void)
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__attribute__ ((weak, alias("__board_flash_wp_on")));
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static void __cpu_secondary_init_r(void)
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{
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}
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void cpu_secondary_init_r(void)
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__attribute__ ((weak, alias("__cpu_secondary_init_r")));
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static int init_func_ram(void)
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{
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#ifdef CONFIG_BOARD_TYPES
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int board_type = gd->board_type;
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#else
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int board_type = 0; /* use dummy arg */
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#endif
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puts("DRAM: ");
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gd->ram_size = initdram(board_type);
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if (gd->ram_size > 0) {
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print_size(gd->ram_size, "");
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board_add_ram_info(0);
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putc('\n');
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return 0;
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}
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puts(failed);
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return 1;
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}
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/***********************************************************************/
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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static int init_func_i2c(void)
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{
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puts("I2C: ");
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#ifdef CONFIG_SYS_I2C
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i2c_init_all();
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#else
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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#endif
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puts("ready\n");
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return 0;
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}
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#endif
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#if defined(CONFIG_HARD_SPI)
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static int init_func_spi(void)
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{
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puts("SPI: ");
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spi_init();
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puts("ready\n");
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return 0;
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}
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#endif
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/***********************************************************************/
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#if defined(CONFIG_WATCHDOG)
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int init_func_watchdog_init(void)
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{
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puts(" Watchdog enabled\n");
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WATCHDOG_RESET();
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return 0;
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}
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int init_func_watchdog_reset(void)
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{
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WATCHDOG_RESET();
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return 0;
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}
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#endif /* CONFIG_WATCHDOG */
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/*
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* Initialization sequence
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*/
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static init_fnc_t *init_sequence[] = {
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#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
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probecpu,
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#endif
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#if defined(CONFIG_BOARD_EARLY_INIT_F)
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board_early_init_f,
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#endif
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#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
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get_clocks, /* get CPU and bus clocks (etc.) */
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#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
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&& !defined(CONFIG_TQM885D)
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adjust_sdram_tbs_8xx,
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#endif
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init_timebase,
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#endif
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#ifdef CONFIG_SYS_ALLOC_DPRAM
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#if !defined(CONFIG_CPM2)
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dpram_init,
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#endif
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#endif
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#if defined(CONFIG_BOARD_POSTCLK_INIT)
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board_postclk_init,
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#endif
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env_init,
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#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
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/* get CPU and bus clocks according to the environment variable */
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get_clocks_866,
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/* adjust sdram refresh rate according to the new clock */
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sdram_adjust_866,
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init_timebase,
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#endif
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init_baudrate,
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serial_init,
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console_init_f,
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display_options,
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#if defined(CONFIG_8260)
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prt_8260_rsr,
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prt_8260_clks,
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#endif /* CONFIG_8260 */
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#if defined(CONFIG_MPC83xx)
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prt_83xx_rsr,
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#endif
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checkcpu,
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#if defined(CONFIG_MPC5xxx)
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prt_mpc5xxx_clks,
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#endif /* CONFIG_MPC5xxx */
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checkboard,
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INIT_FUNC_WATCHDOG_INIT
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#if defined(CONFIG_MISC_INIT_F)
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misc_init_f,
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#endif
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INIT_FUNC_WATCHDOG_RESET
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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init_func_i2c,
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#endif
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#if defined(CONFIG_HARD_SPI)
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init_func_spi,
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#endif
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#ifdef CONFIG_POST
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post_init_f,
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#endif
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INIT_FUNC_WATCHDOG_RESET
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init_func_ram,
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#if defined(CONFIG_SYS_DRAM_TEST)
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testdram,
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#endif /* CONFIG_SYS_DRAM_TEST */
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INIT_FUNC_WATCHDOG_RESET
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NULL, /* Terminate this list */
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};
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ulong get_effective_memsize(void)
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{
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#ifndef CONFIG_VERY_BIG_RAM
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return gd->ram_size;
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#else
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/* limit stack to what we can reasonable map */
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return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
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CONFIG_MAX_MEM_MAPPED : gd->ram_size);
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#endif
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}
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static int __fixup_cpu(void)
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{
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return 0;
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}
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int fixup_cpu(void) __attribute__((weak, alias("__fixup_cpu")));
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/*
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* This is the first part of the initialization sequence that is
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* implemented in C, but still running from ROM.
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*
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* The main purpose is to provide a (serial) console interface as
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* soon as possible (so we can see any error messages), and to
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* initialize the RAM so that we can relocate the monitor code to
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* RAM.
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*
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* Be aware of the restrictions: global data is read-only, BSS is not
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* initialized, and stack space is limited to a few kB.
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*/
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#ifdef CONFIG_LOGBUFFER
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unsigned long logbuffer_base(void)
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{
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return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
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}
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#endif
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void board_init_f(ulong bootflag)
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{
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bd_t *bd;
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ulong len, addr, addr_sp;
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ulong *s;
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gd_t *id;
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init_fnc_t **init_fnc_ptr;
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#ifdef CONFIG_PRAM
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ulong reg;
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#endif
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/* Pointer is writable since we allocated a register for it */
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gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
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/* compiler optimization barrier needed for GCC >= 3.4 */
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__asm__ __volatile__("":::"memory");
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#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
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!defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
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!defined(CONFIG_MPC86xx)
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/* Clear initial global data */
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memset((void *) gd, 0, sizeof(gd_t));
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#endif
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for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr)
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if ((*init_fnc_ptr) () != 0)
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hang();
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#ifdef CONFIG_POST
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post_bootmode_init();
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post_run(NULL, POST_ROM | post_bootmode_get(NULL));
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#endif
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WATCHDOG_RESET();
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/*
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* Now that we have DRAM mapped and working, we can
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* relocate the code and continue running from DRAM.
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*
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* Reserve memory at end of RAM for (top down in that order):
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* - area that won't get touched by U-Boot and Linux (optional)
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* - kernel log buffer
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* - protected RAM
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* - LCD framebuffer
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* - monitor code
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* - board info struct
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*/
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len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
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/*
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* Subtract specified amount of memory to hide so that it won't
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* get "touched" at all by U-Boot. By fixing up gd->ram_size
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* the Linux kernel should now get passed the now "corrected"
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* memory size and won't touch it either. This should work
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* for arch/ppc and arch/powerpc. Only Linux board ports in
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* arch/powerpc with bootwrapper support, that recalculate the
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* memory size from the SDRAM controller setup will have to
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* get fixed.
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*/
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gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
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addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize();
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#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
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/*
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* We need to make sure the location we intend to put secondary core
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* boot code is reserved and not used by any part of u-boot
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*/
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if (addr > determine_mp_bootpg(NULL)) {
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addr = determine_mp_bootpg(NULL);
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debug("Reserving MP boot page to %08lx\n", addr);
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}
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#endif
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#ifdef CONFIG_LOGBUFFER
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#ifndef CONFIG_ALT_LB_ADDR
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/* reserve kernel log buffer */
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addr -= (LOGBUFF_RESERVE);
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debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
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addr);
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#endif
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#endif
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#ifdef CONFIG_PRAM
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/*
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* reserve protected RAM
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*/
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reg = getenv_ulong("pram", 10, CONFIG_PRAM);
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addr -= (reg << 10); /* size is in kB */
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debug("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
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#endif /* CONFIG_PRAM */
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/* round down to next 4 kB limit */
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addr &= ~(4096 - 1);
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debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
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#ifdef CONFIG_LCD
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#ifdef CONFIG_FB_ADDR
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gd->fb_base = CONFIG_FB_ADDR;
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#else
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/* reserve memory for LCD display (always full pages) */
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addr = lcd_setmem(addr);
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gd->fb_base = addr;
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#endif /* CONFIG_FB_ADDR */
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#endif /* CONFIG_LCD */
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#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
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/* reserve memory for video display (always full pages) */
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addr = video_setmem(addr);
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gd->fb_base = addr;
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#endif /* CONFIG_VIDEO */
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/*
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* reserve memory for U-Boot code, data & bss
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* round down to next 4 kB limit
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*/
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addr -= len;
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addr &= ~(4096 - 1);
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#ifdef CONFIG_E500
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/* round down to next 64 kB limit so that IVPR stays aligned */
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addr &= ~(65536 - 1);
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#endif
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debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
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/*
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* reserve memory for malloc() arena
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*/
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addr_sp = addr - TOTAL_MALLOC_LEN;
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debug("Reserving %dk for malloc() at: %08lx\n",
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TOTAL_MALLOC_LEN >> 10, addr_sp);
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/*
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* (permanently) allocate a Board Info struct
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* and a permanent copy of the "global" data
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*/
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addr_sp -= sizeof(bd_t);
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bd = (bd_t *) addr_sp;
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memset(bd, 0, sizeof(bd_t));
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gd->bd = bd;
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debug("Reserving %zu Bytes for Board Info at: %08lx\n",
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sizeof(bd_t), addr_sp);
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addr_sp -= sizeof(gd_t);
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id = (gd_t *) addr_sp;
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debug("Reserving %zu Bytes for Global Data at: %08lx\n",
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sizeof(gd_t), addr_sp);
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/*
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* Finally, we set up a new (bigger) stack.
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*
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* Leave some safety gap for SP, force alignment on 16 byte boundary
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* Clear initial stack frame
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*/
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addr_sp -= 16;
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addr_sp &= ~0xF;
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s = (ulong *) addr_sp;
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*s = 0; /* Terminate back chain */
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*++s = 0; /* NULL return address */
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debug("Stack Pointer at: %08lx\n", addr_sp);
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/*
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* Save local variables to board info struct
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*/
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bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
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bd->bi_memsize = gd->ram_size; /* size in bytes */
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#ifdef CONFIG_SYS_SRAM_BASE
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bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
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bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
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#endif
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#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
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defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
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bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
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#endif
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#if defined(CONFIG_MPC5xxx)
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bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
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#endif
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#if defined(CONFIG_MPC83xx)
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|
bd->bi_immrbar = CONFIG_SYS_IMMR;
|
|
#endif
|
|
|
|
WATCHDOG_RESET();
|
|
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
|
|
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
|
|
#if defined(CONFIG_CPM2)
|
|
bd->bi_cpmfreq = gd->arch.cpm_clk;
|
|
bd->bi_brgfreq = gd->arch.brg_clk;
|
|
bd->bi_sccfreq = gd->arch.scc_clk;
|
|
bd->bi_vco = gd->arch.vco_out;
|
|
#endif /* CONFIG_CPM2 */
|
|
#if defined(CONFIG_MPC512X)
|
|
bd->bi_ipsfreq = gd->arch.ips_clk;
|
|
#endif /* CONFIG_MPC512X */
|
|
#if defined(CONFIG_MPC5xxx)
|
|
bd->bi_ipbfreq = gd->arch.ipb_clk;
|
|
bd->bi_pcifreq = gd->pci_clk;
|
|
#endif /* CONFIG_MPC5xxx */
|
|
bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
|
|
|
|
#ifdef CONFIG_SYS_EXTBDINFO
|
|
strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
|
|
strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
|
|
sizeof(bd->bi_r_version));
|
|
|
|
bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
|
|
bd->bi_plb_busfreq = gd->bus_clk;
|
|
#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
|
|
defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
|
|
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
|
|
bd->bi_pci_busfreq = get_PCI_freq();
|
|
bd->bi_opbfreq = get_OPB_freq();
|
|
#elif defined(CONFIG_XILINX_405)
|
|
bd->bi_pci_busfreq = get_PCI_freq();
|
|
#endif
|
|
#endif
|
|
|
|
debug("New Stack Pointer is: %08lx\n", addr_sp);
|
|
|
|
WATCHDOG_RESET();
|
|
|
|
gd->relocaddr = addr; /* Store relocation addr, useful for debug */
|
|
|
|
memcpy(id, (void *) gd, sizeof(gd_t));
|
|
|
|
relocate_code(addr_sp, id, addr);
|
|
|
|
/* NOTREACHED - relocate_code() does not return */
|
|
}
|
|
|
|
/*
|
|
* This is the next part if the initialization sequence: we are now
|
|
* running from RAM and have a "normal" C environment, i. e. global
|
|
* data can be written, BSS has been cleared, the stack size in not
|
|
* that critical any more, etc.
|
|
*/
|
|
void board_init_r(gd_t *id, ulong dest_addr)
|
|
{
|
|
bd_t *bd;
|
|
ulong malloc_start;
|
|
|
|
#ifndef CONFIG_SYS_NO_FLASH
|
|
ulong flash_size;
|
|
#endif
|
|
|
|
gd = id; /* initialize RAM version of global data */
|
|
bd = gd->bd;
|
|
|
|
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
|
|
|
|
/* The Malloc area is immediately below the monitor copy in DRAM */
|
|
malloc_start = dest_addr - TOTAL_MALLOC_LEN;
|
|
|
|
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
|
|
/*
|
|
* The gd->arch.cpu pointer is set to an address in flash before
|
|
* relocation. We need to update it to point to the same CPU entry
|
|
* in RAM.
|
|
*/
|
|
gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
|
|
|
|
/*
|
|
* If we didn't know the cpu mask & # cores, we can save them of
|
|
* now rather than 'computing' them constantly
|
|
*/
|
|
fixup_cpu();
|
|
#endif
|
|
|
|
#ifdef CONFIG_SYS_EXTRA_ENV_RELOC
|
|
/*
|
|
* Some systems need to relocate the env_addr pointer early because the
|
|
* location it points to will get invalidated before env_relocate is
|
|
* called. One example is on systems that might use a L2 or L3 cache
|
|
* in SRAM mode and initialize that cache from SRAM mode back to being
|
|
* a cache in cpu_init_r.
|
|
*/
|
|
gd->env_addr += dest_addr - CONFIG_SYS_MONITOR_BASE;
|
|
#endif
|
|
|
|
serial_initialize();
|
|
|
|
debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
|
|
|
|
WATCHDOG_RESET();
|
|
|
|
/*
|
|
* Setup trap handlers
|
|
*/
|
|
trap_init(dest_addr);
|
|
|
|
#ifdef CONFIG_ADDR_MAP
|
|
init_addr_map();
|
|
#endif
|
|
|
|
#if defined(CONFIG_BOARD_EARLY_INIT_R)
|
|
board_early_init_r();
|
|
#endif
|
|
|
|
monitor_flash_len = (ulong)&__init_end - dest_addr;
|
|
|
|
WATCHDOG_RESET();
|
|
|
|
#ifdef CONFIG_LOGBUFFER
|
|
logbuff_init_ptrs();
|
|
#endif
|
|
#ifdef CONFIG_POST
|
|
post_output_backlog();
|
|
#endif
|
|
|
|
WATCHDOG_RESET();
|
|
|
|
#if defined(CONFIG_SYS_DELAYED_ICACHE)
|
|
icache_enable(); /* it's time to enable the instruction cache */
|
|
#endif
|
|
|
|
#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
|
|
unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
|
|
#endif
|
|
|
|
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
|
|
/*
|
|
* Do early PCI configuration _before_ the flash gets initialised,
|
|
* because PCU ressources are crucial for flash access on some boards.
|
|
*/
|
|
pci_init();
|
|
#endif
|
|
#if defined(CONFIG_WINBOND_83C553)
|
|
/*
|
|
* Initialise the ISA bridge
|
|
*/
|
|
initialise_w83c553f();
|
|
#endif
|
|
|
|
asm("sync ; isync");
|
|
|
|
mem_malloc_init(malloc_start, TOTAL_MALLOC_LEN);
|
|
|
|
#if !defined(CONFIG_SYS_NO_FLASH)
|
|
puts("Flash: ");
|
|
|
|
if (board_flash_wp_on()) {
|
|
printf("Uninitialized - Write Protect On\n");
|
|
/* Since WP is on, we can't find real size. Set to 0 */
|
|
flash_size = 0;
|
|
} else if ((flash_size = flash_init()) > 0) {
|
|
#ifdef CONFIG_SYS_FLASH_CHECKSUM
|
|
print_size(flash_size, "");
|
|
/*
|
|
* Compute and print flash CRC if flashchecksum is set to 'y'
|
|
*
|
|
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
|
|
*/
|
|
if (getenv_yesno("flashchecksum") == 1) {
|
|
printf(" CRC: %08X",
|
|
crc32(0,
|
|
(const unsigned char *)
|
|
CONFIG_SYS_FLASH_BASE, flash_size)
|
|
);
|
|
}
|
|
putc('\n');
|
|
#else /* !CONFIG_SYS_FLASH_CHECKSUM */
|
|
print_size(flash_size, "\n");
|
|
#endif /* CONFIG_SYS_FLASH_CHECKSUM */
|
|
} else {
|
|
puts(failed);
|
|
hang();
|
|
}
|
|
|
|
/* update start of FLASH memory */
|
|
bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
|
|
/* size of FLASH memory (final value) */
|
|
bd->bi_flashsize = flash_size;
|
|
|
|
#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
|
|
/* Make a update of the Memctrl. */
|
|
update_flash_size(flash_size);
|
|
#endif
|
|
|
|
|
|
#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
|
|
/* flash mapped at end of memory map */
|
|
bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
|
|
#elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
|
|
bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
|
|
#endif
|
|
#endif /* !CONFIG_SYS_NO_FLASH */
|
|
|
|
WATCHDOG_RESET();
|
|
|
|
/* initialize higher level parts of CPU like time base and timers */
|
|
cpu_init_r();
|
|
|
|
WATCHDOG_RESET();
|
|
|
|
#ifdef CONFIG_SPI
|
|
#if !defined(CONFIG_ENV_IS_IN_EEPROM)
|
|
spi_init_f();
|
|
#endif
|
|
spi_init_r();
|
|
#endif
|
|
|
|
#if defined(CONFIG_CMD_NAND)
|
|
WATCHDOG_RESET();
|
|
puts("NAND: ");
|
|
nand_init(); /* go init the NAND */
|
|
#endif
|
|
|
|
#ifdef CONFIG_GENERIC_MMC
|
|
/*
|
|
* MMC initialization is called before relocating env.
|
|
* Thus It is required that operations like pin multiplexer
|
|
* be put in board_init.
|
|
*/
|
|
WATCHDOG_RESET();
|
|
puts("MMC: ");
|
|
mmc_initialize(bd);
|
|
#endif
|
|
|
|
/* relocate environment function pointers etc. */
|
|
env_relocate();
|
|
|
|
/*
|
|
* after non-volatile devices & environment is setup and cpu code have
|
|
* another round to deal with any initialization that might require
|
|
* full access to the environment or loading of some image (firmware)
|
|
* from a non-volatile device
|
|
*/
|
|
cpu_secondary_init_r();
|
|
|
|
/*
|
|
* Fill in missing fields of bd_info.
|
|
* We do this here, where we have "normal" access to the
|
|
* environment; we used to do this still running from ROM,
|
|
* where had to use getenv_f(), which can be pretty slow when
|
|
* the environment is in EEPROM.
|
|
*/
|
|
|
|
#if defined(CONFIG_SYS_EXTBDINFO)
|
|
#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
|
|
#if defined(CONFIG_I2CFAST)
|
|
/*
|
|
* set bi_iic_fast for linux taking environment variable
|
|
* "i2cfast" into account
|
|
*/
|
|
{
|
|
if (getenv_yesno("i2cfast") == 1) {
|
|
bd->bi_iic_fast[0] = 1;
|
|
bd->bi_iic_fast[1] = 1;
|
|
}
|
|
}
|
|
#endif /* CONFIG_I2CFAST */
|
|
#endif /* CONFIG_405GP, CONFIG_405EP */
|
|
#endif /* CONFIG_SYS_EXTBDINFO */
|
|
|
|
#if defined(CONFIG_SC3)
|
|
sc3_read_eeprom();
|
|
#endif
|
|
|
|
#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
|
|
mac_read_from_eeprom();
|
|
#endif
|
|
|
|
#ifdef CONFIG_HERMES
|
|
if ((gd->board_type >> 16) == 2)
|
|
bd->bi_ethspeed = gd->board_type & 0xFFFF;
|
|
else
|
|
bd->bi_ethspeed = 0xFFFF;
|
|
#endif
|
|
|
|
#ifdef CONFIG_CMD_NET
|
|
/* kept around for legacy kernels only ... ignore the next section */
|
|
eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
|
|
#ifdef CONFIG_HAS_ETH1
|
|
eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr);
|
|
#endif
|
|
#ifdef CONFIG_HAS_ETH2
|
|
eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr);
|
|
#endif
|
|
#ifdef CONFIG_HAS_ETH3
|
|
eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr);
|
|
#endif
|
|
#ifdef CONFIG_HAS_ETH4
|
|
eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr);
|
|
#endif
|
|
#ifdef CONFIG_HAS_ETH5
|
|
eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr);
|
|
#endif
|
|
#endif /* CONFIG_CMD_NET */
|
|
|
|
WATCHDOG_RESET();
|
|
|
|
#if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
|
|
/*
|
|
* Do pci configuration
|
|
*/
|
|
pci_init();
|
|
#endif
|
|
|
|
/** leave this here (after malloc(), environment and PCI are working) **/
|
|
/* Initialize stdio devices */
|
|
stdio_init();
|
|
|
|
/* Initialize the jump table for applications */
|
|
jumptable_init();
|
|
|
|
#if defined(CONFIG_API)
|
|
/* Initialize API */
|
|
api_init();
|
|
#endif
|
|
|
|
/* Initialize the console (after the relocation and devices init) */
|
|
console_init_r();
|
|
|
|
#if defined(CONFIG_MISC_INIT_R)
|
|
/* miscellaneous platform dependent initialisations */
|
|
misc_init_r();
|
|
#endif
|
|
|
|
#ifdef CONFIG_HERMES
|
|
if (bd->bi_ethspeed != 0xFFFF)
|
|
hermes_start_lxt980((int) bd->bi_ethspeed);
|
|
#endif
|
|
|
|
#if defined(CONFIG_CMD_KGDB)
|
|
WATCHDOG_RESET();
|
|
puts("KGDB: ");
|
|
kgdb_init();
|
|
#endif
|
|
|
|
debug("U-Boot relocated to %08lx\n", dest_addr);
|
|
|
|
/*
|
|
* Enable Interrupts
|
|
*/
|
|
interrupt_init();
|
|
|
|
#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
|
|
status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
|
|
#endif
|
|
|
|
udelay(20);
|
|
|
|
/* Initialize from environment */
|
|
load_addr = getenv_ulong("loadaddr", 16, load_addr);
|
|
|
|
WATCHDOG_RESET();
|
|
|
|
#if defined(CONFIG_CMD_SCSI)
|
|
WATCHDOG_RESET();
|
|
puts("SCSI: ");
|
|
scsi_init();
|
|
#endif
|
|
|
|
#if defined(CONFIG_CMD_DOC)
|
|
WATCHDOG_RESET();
|
|
puts("DOC: ");
|
|
doc_init();
|
|
#endif
|
|
|
|
#ifdef CONFIG_BITBANGMII
|
|
bb_miiphy_init();
|
|
#endif
|
|
#if defined(CONFIG_CMD_NET)
|
|
WATCHDOG_RESET();
|
|
puts("Net: ");
|
|
eth_initialize(bd);
|
|
#endif
|
|
|
|
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
|
|
WATCHDOG_RESET();
|
|
debug("Reset Ethernet PHY\n");
|
|
reset_phy();
|
|
#endif
|
|
|
|
#ifdef CONFIG_POST
|
|
post_run(NULL, POST_RAM | post_bootmode_get(0));
|
|
#endif
|
|
|
|
#if defined(CONFIG_CMD_PCMCIA) \
|
|
&& !defined(CONFIG_CMD_IDE)
|
|
WATCHDOG_RESET();
|
|
puts("PCMCIA:");
|
|
pcmcia_init();
|
|
#endif
|
|
|
|
#if defined(CONFIG_CMD_IDE)
|
|
WATCHDOG_RESET();
|
|
#ifdef CONFIG_IDE_8xx_PCCARD
|
|
puts("PCMCIA:");
|
|
#else
|
|
puts("IDE: ");
|
|
#endif
|
|
#if defined(CONFIG_START_IDE)
|
|
if (board_start_ide())
|
|
ide_init();
|
|
#else
|
|
ide_init();
|
|
#endif
|
|
#endif
|
|
|
|
#ifdef CONFIG_LAST_STAGE_INIT
|
|
WATCHDOG_RESET();
|
|
/*
|
|
* Some parts can be only initialized if all others (like
|
|
* Interrupts) are up and running (i.e. the PC-style ISA
|
|
* keyboard).
|
|
*/
|
|
last_stage_init();
|
|
#endif
|
|
|
|
#if defined(CONFIG_CMD_BEDBUG)
|
|
WATCHDOG_RESET();
|
|
bedbug_init();
|
|
#endif
|
|
|
|
#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
|
|
/*
|
|
* Export available size of memory for Linux,
|
|
* taking into account the protected RAM at top of memory
|
|
*/
|
|
{
|
|
ulong pram = 0;
|
|
char memsz[32];
|
|
|
|
#ifdef CONFIG_PRAM
|
|
pram = getenv_ulong("pram", 10, CONFIG_PRAM);
|
|
#endif
|
|
#ifdef CONFIG_LOGBUFFER
|
|
#ifndef CONFIG_ALT_LB_ADDR
|
|
/* Also take the logbuffer into account (pram is in kB) */
|
|
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
|
|
#endif
|
|
#endif
|
|
sprintf(memsz, "%ldk", (ulong) (bd->bi_memsize / 1024) - pram);
|
|
setenv("mem", memsz);
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_PS2KBD
|
|
puts("PS/2: ");
|
|
kbd_init();
|
|
#endif
|
|
|
|
#ifdef CONFIG_MODEM_SUPPORT
|
|
{
|
|
extern int do_mdm_init;
|
|
|
|
do_mdm_init = gd->do_mdm_init;
|
|
}
|
|
#endif
|
|
|
|
/* Initialization complete - start the monitor */
|
|
|
|
/* main_loop() can return to retry autoboot, if so just run it again. */
|
|
for (;;) {
|
|
WATCHDOG_RESET();
|
|
main_loop();
|
|
}
|
|
|
|
/* NOTREACHED - no way out of command loop except booting */
|
|
}
|
|
|
|
#if 0 /* We could use plain global data, but the resulting code is bigger */
|
|
/*
|
|
* Pointer to initial global data area
|
|
*
|
|
* Here we initialize it.
|
|
*/
|
|
#undef XTRN_DECLARE_GLOBAL_DATA_PTR
|
|
#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
|
|
DECLARE_GLOBAL_DATA_PTR =
|
|
(gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
|
|
#endif /* 0 */
|
|
|
|
/************************************************************************/
|
|
|