upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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340 lines
7.1 KiB
340 lines
7.1 KiB
/*
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* Novena board support
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*
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* Copyright (C) 2014 Marek Vasut <marex@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/errno.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/mxc_hdmi.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/imx-common/boot_mode.h>
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#include <asm/imx-common/iomux-v3.h>
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#include <asm/imx-common/mxc_i2c.h>
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#include <asm/imx-common/sata.h>
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#include <asm/imx-common/video.h>
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#include <fsl_esdhc.h>
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#include <i2c.h>
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#include <input.h>
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#include <ipu_pixfmt.h>
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#include <linux/fb.h>
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#include <linux/input.h>
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#include <malloc.h>
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#include <micrel.h>
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#include <miiphy.h>
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#include <mmc.h>
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#include <netdev.h>
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#include <power/pmic.h>
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#include <power/pfuze100_pmic.h>
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#include <stdio_dev.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define NOVENA_BUTTON_GPIO IMX_GPIO_NR(4, 14)
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#define NOVENA_SD_WP IMX_GPIO_NR(1, 2)
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#define NOVENA_SD_CD IMX_GPIO_NR(1, 4)
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/*
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* GPIO button
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*/
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#ifdef CONFIG_KEYBOARD
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static struct input_config button_input;
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static int novena_gpio_button_read_keys(struct input_config *input)
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{
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int key = KEY_ENTER;
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if (gpio_get_value(NOVENA_BUTTON_GPIO))
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return 0;
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input_send_keycodes(&button_input, &key, 1);
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return 1;
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}
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static int novena_gpio_button_getc(struct stdio_dev *dev)
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{
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return input_getc(&button_input);
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}
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static int novena_gpio_button_tstc(struct stdio_dev *dev)
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{
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return input_tstc(&button_input);
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}
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static int novena_gpio_button_init(struct stdio_dev *dev)
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{
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gpio_direction_input(NOVENA_BUTTON_GPIO);
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input_set_delays(&button_input, 250, 250);
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return 0;
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}
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int drv_keyboard_init(void)
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{
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int error;
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struct stdio_dev dev = {
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.name = "button",
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.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM,
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.start = novena_gpio_button_init,
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.getc = novena_gpio_button_getc,
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.tstc = novena_gpio_button_tstc,
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};
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error = input_init(&button_input, 0);
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if (error) {
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debug("%s: Cannot set up input\n", __func__);
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return -1;
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}
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button_input.read_keys = novena_gpio_button_read_keys;
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error = input_stdio_register(&dev);
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if (error)
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return error;
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return 0;
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}
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#endif
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/*
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* SDHC
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*/
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#ifdef CONFIG_FSL_ESDHC
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static struct fsl_esdhc_cfg usdhc_cfg[] = {
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{ USDHC3_BASE_ADDR, 0, 4 }, /* Micro SD */
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{ USDHC2_BASE_ADDR, 0, 4 }, /* Big SD */
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};
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int board_mmc_getcd(struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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/* There is no CD for a microSD card, assume always present. */
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if (cfg->esdhc_base == USDHC3_BASE_ADDR)
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return 1;
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else
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return !gpio_get_value(NOVENA_SD_CD);
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}
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int board_mmc_getwp(struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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/* There is no WP for a microSD card, assume always read-write. */
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if (cfg->esdhc_base == USDHC3_BASE_ADDR)
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return 0;
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else
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return gpio_get_value(NOVENA_SD_WP);
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}
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int board_mmc_init(bd_t *bis)
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{
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s32 status = 0;
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int index;
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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/* Big SD write-protect and card-detect */
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gpio_direction_input(NOVENA_SD_WP);
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gpio_direction_input(NOVENA_SD_CD);
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for (index = 0; index < ARRAY_SIZE(usdhc_cfg); index++) {
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status = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
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if (status)
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return status;
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}
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return status;
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}
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#endif
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/*
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* Video over HDMI
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*/
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#if defined(CONFIG_VIDEO_IPUV3)
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static void enable_hdmi(struct display_info_t const *dev)
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{
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imx_enable_hdmi_phy();
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}
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struct display_info_t const displays[] = {
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{
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/* HDMI Output */
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.bus = -1,
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.addr = 0,
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.pixfmt = IPU_PIX_FMT_RGB24,
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.detect = detect_hdmi,
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.enable = enable_hdmi,
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.mode = {
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.name = "HDMI",
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.refresh = 60,
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.xres = 1024,
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.yres = 768,
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.pixclock = 15385,
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.left_margin = 220,
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.right_margin = 40,
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.upper_margin = 21,
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.lower_margin = 7,
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.hsync_len = 60,
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.vsync_len = 10,
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.sync = FB_SYNC_EXT,
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.vmode = FB_VMODE_NONINTERLACED
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}
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}
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};
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size_t display_count = ARRAY_SIZE(displays);
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static void setup_display(void)
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{
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struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
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struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
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enable_ipu_clock();
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imx_setup_hdmi();
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/* Turn on LDB0,IPU,IPU DI0 clocks */
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setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK);
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/* set LDB0, LDB1 clk select to 011/011 */
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clrsetbits_le32(&mxc_ccm->cs2cdr,
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MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK |
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MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK,
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(3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) |
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(3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET));
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setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
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setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 <<
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MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
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writel(IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES |
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IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH |
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IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |
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IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG |
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IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT |
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IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
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IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
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IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED |
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IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0,
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&iomux->gpr[2]);
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clrsetbits_le32(&iomux->gpr[3], IOMUXC_GPR3_LVDS0_MUX_CTL_MASK,
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IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
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IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
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}
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#endif
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int board_early_init_f(void)
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{
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#if defined(CONFIG_VIDEO_IPUV3)
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setup_display();
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#endif
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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#ifdef CONFIG_CMD_SATA
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setup_sata();
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#endif
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: Novena 4x\n");
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = imx_ddr_size();
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return 0;
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}
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/* setup board specific PMIC */
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int power_init_board(void)
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{
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struct pmic *p;
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u32 reg;
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int ret;
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power_pfuze100_init(1);
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p = pmic_get("PFUZE100");
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if (!p)
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return -EINVAL;
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ret = pmic_probe(p);
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if (ret)
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return ret;
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pmic_reg_read(p, PFUZE100_DEVICEID, ®);
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printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
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/* Set SWBST to 5.0V and enable (for USB) */
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pmic_reg_read(p, PFUZE100_SWBSTCON1, ®);
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reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK);
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reg |= (SWBST_5_00V | SWBST_MODE_AUTO);
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pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
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return 0;
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}
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/* EEPROM configuration data */
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struct novena_eeprom_data {
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uint8_t signature[6];
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uint8_t version;
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uint8_t reserved;
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uint32_t serial;
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uint8_t mac[6];
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uint16_t features;
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};
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int misc_init_r(void)
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{
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struct novena_eeprom_data data;
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uchar *datap = (uchar *)&data;
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const char *signature = "Novena";
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int ret;
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/* If 'ethaddr' is already set, do nothing. */
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if (getenv("ethaddr"))
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return 0;
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/* EEPROM is at bus 2. */
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ret = i2c_set_bus_num(2);
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if (ret) {
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puts("Cannot select EEPROM I2C bus.\n");
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return 0;
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}
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/* EEPROM is at address 0x56. */
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ret = eeprom_read(0x56, 0, datap, sizeof(data));
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if (ret) {
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puts("Cannot read I2C EEPROM.\n");
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return 0;
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}
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/* Check EEPROM signature. */
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if (memcmp(data.signature, signature, 6)) {
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puts("Invalid I2C EEPROM signature.\n");
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return 0;
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}
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/* Set ethernet address from EEPROM. */
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eth_setenv_enetaddr("ethaddr", data.mac);
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return ret;
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}
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