upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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53 lines
1.3 KiB
53 lines
1.3 KiB
/*
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* Faraday FTSDC010 Secure Digital Memory Card Host Controller
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*
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* Copyright (C) 2011 Andes Technology Corporation
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <mmc.h>
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#ifndef __FTSDC010_MCI_H
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#define __FTSDC010_MCI_H
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struct ftsdc010_chip {
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void __iomem *regs;
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uint32_t wprot; /* write protected (locked) */
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uint32_t rate; /* actual SD clock in Hz */
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uint32_t sclk; /* FTSDC010 source clock in Hz */
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uint32_t fifo; /* fifo depth in bytes */
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uint32_t acmd;
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struct mmc_config cfg; /* mmc configuration */
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const char *name;
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void *ioaddr;
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unsigned int caps;
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unsigned int version;
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unsigned int clock;
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unsigned int bus_hz;
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unsigned int div;
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int dev_index;
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int dev_id;
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int buswidth;
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u32 fifoth_val;
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struct mmc *mmc;
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void *priv;
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bool fifo_mode;
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};
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#ifdef CONFIG_DM_MMC
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/* Export the operations to drivers */
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int ftsdc010_probe(struct udevice *dev);
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extern const struct dm_mmc_ops dm_ftsdc010_ops;
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#endif
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void ftsdc_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
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uint caps, u32 max_clk, u32 min_clk);
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void set_bus_width(struct ftsdc010_mmc __iomem *regs, struct mmc_config *cfg);
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#ifdef CONFIG_BLK
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int ftsdc010_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg);
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#endif
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#endif /* __FTSDC010_MCI_H */
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