upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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161 lines
3.8 KiB
161 lines
3.8 KiB
/*
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* include/asm-microblaze/system.h -- Low-level interrupt/thread ops
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*
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* Copyright (C) 2003 John Williams (jwilliams@itee.uq.edu.au)
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* based upon microblaze version
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* Copyright (C) 2001 NEC Corporation
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* Copyright (C) 2001 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* Written by Miles Bader <miles@gnu.org>
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* Microblaze port by John Williams
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* Microblaze port by John Williams
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*/
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#ifndef __MICROBLAZE_SYSTEM_H__
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#define __MICROBLAZE_SYSTEM_H__
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#if 0
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#include <linux/linkage.h>
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#endif
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#include <asm/ptrace.h>
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#define prepare_to_switch() do { } while (0)
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/*
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* switch_to(n) should switch tasks to task ptr, first checking that
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* ptr isn't the current task, in which case it does nothing.
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*/
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struct thread_struct;
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extern void *switch_thread (struct thread_struct *last,
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struct thread_struct *next);
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#define switch_to(prev,next,last) do { \
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if (prev != next) { \
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(last) = switch_thread (&prev->thread, &next->thread); \
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} \
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} while (0)
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/* Enable/disable interrupts. */
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#define __sti() \
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{ \
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register unsigned tmp; \
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__asm__ __volatile__ (" \
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mfs %0, rmsr; \
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ori %0, %0, 2; \
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mts rmsr, %0" \
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: "=r" (tmp) \
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: \
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: "memory"); \
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}
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#define __cli() \
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{ \
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register unsigned tmp; \
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__asm__ __volatile__ (" \
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mfs %0, rmsr; \
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andi %0, %0, ~2; \
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mts rmsr, %0" \
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: "=r" (tmp) \
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: \
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: "memory"); \
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}
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#define __save_flags(flags) \
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__asm__ __volatile__ ("mfs %0, rmsr" : "=r" (flags))
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#define __restore_flags(flags) \
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__asm__ __volatile__ ("mts rmsr, %0" :: "r" (flags))
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#define __save_flags_cli(flags) \
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{ \
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register unsigned tmp; \
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__asm__ __volatile__ (" \
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mfs %0, rmsr; \
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andi %1, %0, ~2; \
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mts rmsr, %1;" \
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: "=r" (flags), "=r" (tmp) \
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: \
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: "memory"); \
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}
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#define __save_flags_sti(flags) \
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{ \
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register unsigned tmp; \
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__asm__ __volatile__ (" \
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mfs %0, rmsr; \
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ori %1, %0, 2; \
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mts rmsr, %1;" \
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: "=r" (flags) ,"=r" (tmp) \
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: \
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: "memory"); \
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}
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/* For spinlocks etc */
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#define local_irq_save(flags) __save_flags_cli (flags)
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#define local_irq_set(flags) __save_flags_sti (flags)
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#define local_irq_restore(flags) __restore_flags (flags)
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#define local_irq_disable() __cli ()
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#define local_irq_enable() __sti ()
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#define cli() __cli ()
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#define sti() __sti ()
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#define save_flags(flags) __save_flags (flags)
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#define restore_flags(flags) __restore_flags (flags)
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#define save_flags_cli(flags) __save_flags_cli (flags)
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/*
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* Force strict CPU ordering.
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* Not really required on microblaze...
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*/
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#define nop() __asm__ __volatile__ ("nop")
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#define mb() __asm__ __volatile__ ("nop" ::: "memory")
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#define rmb() mb ()
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#define wmb() mb ()
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#define set_mb(var, value) do { var = value; mb(); } while (0)
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#define set_wmb(var, value) do { var = value; wmb (); } while (0)
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#ifdef CONFIG_SMP
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#define smp_mb() mb ()
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#define smp_rmb() rmb ()
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#define smp_wmb() wmb ()
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#else
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#define smp_mb() barrier ()
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#define smp_rmb() barrier ()
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#define smp_wmb() barrier ()
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#endif
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#define xchg(ptr, with) \
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((__typeof__ (*(ptr)))__xchg ((unsigned long)(with), (ptr), sizeof (*(ptr))))
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#define tas(ptr) (xchg ((ptr), 1))
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static inline unsigned long __xchg(unsigned long with,
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__volatile__ void *ptr, int size)
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{
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unsigned long tmp, flags;
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save_flags_cli (flags);
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switch (size) {
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case 1:
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tmp = *(unsigned char *)ptr;
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*(unsigned char *)ptr = with;
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break;
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case 2:
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tmp = *(unsigned short *)ptr;
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*(unsigned short *)ptr = with;
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break;
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case 4:
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tmp = *(unsigned long *)ptr;
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*(unsigned long *)ptr = with;
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break;
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}
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restore_flags (flags);
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return tmp;
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}
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#endif /* __MICROBLAZE_SYSTEM_H__ */
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