upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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71 lines
1.5 KiB
71 lines
1.5 KiB
/*
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* (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
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* Rohit Choraria <rohitkc@ti.com>
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*
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* (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_OMAP_GPMC_H
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#define __ASM_OMAP_GPMC_H
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#include <asm/arch/omap_gpmc.h>
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#define GPMC_BUF_EMPTY 0
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#define GPMC_BUF_FULL 1
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#define ECCCLEAR (0x1 << 8)
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#define ECCRESULTREG1 (0x1 << 0)
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#define ECCSIZE512BYTE 0xFF
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#define ECCSIZE1 (ECCSIZE512BYTE << 22)
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#define ECCSIZE0 (ECCSIZE512BYTE << 12)
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#define ECCSIZE0SEL (0x000 << 0)
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/* Generic ECC Layouts */
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/* Large Page x8 NAND device Layout */
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#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 12,\
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.eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
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9, 10, 11, 12},\
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.oobfree = {\
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{.offset = 13,\
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.length = 51 } } \
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}
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#endif
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/* Large Page x16 NAND device Layout */
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#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 12,\
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.eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
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10, 11, 12, 13},\
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.oobfree = {\
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{.offset = 14,\
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.length = 50 } } \
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}
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#endif
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/* Small Page x8 NAND device Layout */
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#ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 3,\
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.eccpos = {1, 2, 3},\
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.oobfree = {\
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{.offset = 4,\
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.length = 12 } } \
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}
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#endif
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/* Small Page x16 NAND device Layout */
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#ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 3,\
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.eccpos = {2, 3, 4},\
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.oobfree = {\
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{.offset = 5,\
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.length = 11 } } \
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}
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#endif
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#endif /* __ASM_OMAP_GPMC_H */
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