upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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129 lines
3.5 KiB
129 lines
3.5 KiB
/*
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* Copyright 2010-2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <spi.h>
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#include <asm/io.h>
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#include <asm/immap.h>
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#include <mmc.h>
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#include <fsl_esdhc.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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/*
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* need to to:
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* Check serial flash size. if 2mb evb, else 8mb demo
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*/
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puts("Board: ");
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puts("Freescale MCF54418 Tower System\n");
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return 0;
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};
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phys_size_t initdram(int board_type)
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{
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u32 dramsize;
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#if defined(CONFIG_SERIAL_BOOT)
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/*
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* Serial Boot: The dram is already initialized in start.S
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* only require to return DRAM size
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*/
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dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
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#else
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sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
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ccm_t *ccm = (ccm_t *)MMAP_CCM;
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gpio_t *gpio = (gpio_t *) MMAP_GPIO;
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pm_t *pm = (pm_t *) MMAP_PM;
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u32 i;
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dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
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for (i = 0x13; i < 0x20; i++) {
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if (dramsize == (1 << i))
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break;
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}
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out_8(&pm->pmcr0, 0x2E);
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out_8(&gpio->mscr_sdram, 1);
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clrbits_be16(&ccm->misccr2, CCM_MISCCR2_FBHALF);
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setbits_be16(&ccm->misccr2, CCM_MISCCR2_DDR2CLK);
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out_be32(&sdram->rcrcr, 0x40000000);
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out_be32(&sdram->padcr, 0x01030203);
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out_be32(&sdram->cr00, 0x01010101);
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out_be32(&sdram->cr01, 0x00000101);
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out_be32(&sdram->cr02, 0x01010100);
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out_be32(&sdram->cr03, 0x01010000);
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out_be32(&sdram->cr04, 0x00010101);
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out_be32(&sdram->cr06, 0x00010100);
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out_be32(&sdram->cr07, 0x00000001);
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out_be32(&sdram->cr08, 0x01000001);
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out_be32(&sdram->cr09, 0x00000100);
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out_be32(&sdram->cr10, 0x00010001);
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out_be32(&sdram->cr11, 0x00000200);
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out_be32(&sdram->cr12, 0x01000002);
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out_be32(&sdram->cr13, 0x00000000);
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out_be32(&sdram->cr14, 0x00000100);
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out_be32(&sdram->cr15, 0x02000100);
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out_be32(&sdram->cr16, 0x02000407);
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out_be32(&sdram->cr17, 0x02030007);
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out_be32(&sdram->cr18, 0x02000100);
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out_be32(&sdram->cr19, 0x0A030203);
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out_be32(&sdram->cr20, 0x00020708);
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out_be32(&sdram->cr21, 0x00050008);
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out_be32(&sdram->cr22, 0x04030002);
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out_be32(&sdram->cr23, 0x00000004);
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out_be32(&sdram->cr24, 0x020A0000);
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out_be32(&sdram->cr25, 0x0C00000E);
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out_be32(&sdram->cr26, 0x00002004);
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out_be32(&sdram->cr28, 0x00100010);
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out_be32(&sdram->cr29, 0x00100010);
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out_be32(&sdram->cr31, 0x07990000);
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out_be32(&sdram->cr40, 0x00000000);
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out_be32(&sdram->cr41, 0x00C80064);
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out_be32(&sdram->cr42, 0x44520002);
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out_be32(&sdram->cr43, 0x00C80023);
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out_be32(&sdram->cr45, 0x0000C350);
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out_be32(&sdram->cr56, 0x04000000);
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out_be32(&sdram->cr57, 0x03000304);
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out_be32(&sdram->cr58, 0x40040000);
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out_be32(&sdram->cr59, 0xC0004004);
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out_be32(&sdram->cr60, 0x0642C000);
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out_be32(&sdram->cr61, 0x00000642);
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asm("tpf");
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out_be32(&sdram->cr09, 0x01000100);
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udelay(100);
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#endif
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return dramsize;
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};
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int testdram(void)
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{
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return 0;
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}
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