upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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113 lines
2.8 KiB
113 lines
2.8 KiB
/**
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* @file IxEthAccQueueAssign_p.h
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*
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* @author Intel Corporation
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* @date 06-Mar-2002
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*
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* @brief Mapping from QMgr Q's to internal assignment
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*
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* Design Notes:
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*
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*
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* @par
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* IXP400 SW Release version 2.0
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*
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* -- Copyright Notice --
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*
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* @par
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* Copyright 2001-2005, Intel Corporation.
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* All rights reserved.
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*
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* @par
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* SPDX-License-Identifier: BSD-3-Clause
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* @par
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* -- End of Copyright Notice --
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*/
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/**
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* @addtogroup IxEthAccPri
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*@{
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*/
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/*
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* Os/System dependancies.
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*/
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#include "IxOsal.h"
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/*
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* Intermodule dependancies
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*/
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#include "IxQMgr.h"
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#include "IxQueueAssignments.h"
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/* Check range of Q's assigned to this component. */
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#if IX_ETH_ACC_RX_FRAME_ETH_Q >= (IX_QMGR_MIN_QUEUPP_QID ) | \
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IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
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IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
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IX_ETH_ACC_TX_FRAME_ENET0_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
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IX_ETH_ACC_TX_FRAME_ENET1_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
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IX_ETH_ACC_TX_FRAME_DONE_ETH_Q >= (IX_QMGR_MIN_QUEUPP_QID)
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#error "Not all Ethernet Access Queues are betweem 1-31, requires full functionalty Q's unless otherwise validated "
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#endif
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/**
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*
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* @typedef IxEthAccQregInfo
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*
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* @brief
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*
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*/
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typedef struct
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{
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IxQMgrQId qId;
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char *qName;
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IxQMgrCallback qCallback;
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IxQMgrCallbackId callbackTag;
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IxQMgrQSizeInWords qSize;
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IxQMgrQEntrySizeInWords qWords;
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BOOL qNotificationEnableAtStartup;
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IxQMgrSourceId qConditionSource;
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IxQMgrWMLevel AlmostEmptyThreshold;
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IxQMgrWMLevel AlmostFullThreshold;
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} IxEthAccQregInfo;
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/*
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* Prototypes for all QM callbacks.
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*/
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/*
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* Rx Callbacks
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*/
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IX_ETH_ACC_PUBLIC
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void ixEthRxFrameQMCallback(IxQMgrQId, IxQMgrCallbackId);
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IX_ETH_ACC_PUBLIC
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void ixEthRxMultiBufferQMCallback(IxQMgrQId, IxQMgrCallbackId);
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IX_ETH_ACC_PUBLIC
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void ixEthRxFreeQMCallback(IxQMgrQId, IxQMgrCallbackId);
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/*
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* Tx Callback.
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*/
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IX_ETH_ACC_PUBLIC
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void ixEthTxFrameQMCallback(IxQMgrQId, IxQMgrCallbackId);
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IX_ETH_ACC_PUBLIC
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void ixEthTxFrameDoneQMCallback(IxQMgrQId, IxQMgrCallbackId );
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#define IX_ETH_ACC_QM_QUEUE_DISPATCH_PRIORITY (IX_QMGR_Q_PRIORITY_0) /* Highest priority */
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/*
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* Queue watermarks
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*/
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#define IX_ETH_ACC_RX_FRAME_ETH_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_NOT_E )
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#define IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
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#define IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
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#define IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
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#define IX_ETH_ACC_TX_FRAME_ENET0_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
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#define IX_ETH_ACC_TX_FRAME_ENET1_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
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#define IX_ETH_ACC_TX_FRAME_ENET2_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
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#define IX_ETH_ACC_TX_FRAME_DONE_ETH_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_NOT_E )
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