upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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390 lines
9.6 KiB
390 lines
9.6 KiB
/**
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* @file IxNpeDlMacros_p.h
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*
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* @author Intel Corporation
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* @date 21 January 2002
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*
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* @brief This file contains the macros for the IxNpeDl component.
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*
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*
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* @par
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* IXP400 SW Release version 2.0
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*
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* -- Copyright Notice --
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*
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* @par
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* Copyright 2001-2005, Intel Corporation.
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* All rights reserved.
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*
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* @par
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* SPDX-License-Identifier: BSD-3-Clause
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* @par
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* -- End of Copyright Notice --
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*/
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/**
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* @defgroup IxNpeDlMacros_p IxNpeDlMacros_p
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*
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* @brief Macros for the IxNpeDl component.
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*
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* @{
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*/
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#ifndef IXNPEDLMACROS_P_H
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#define IXNPEDLMACROS_P_H
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/*
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* Put the user defined include files required.
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*/
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#if (CPU != XSCALE)
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/* To support IxNpeDl unit tests... */
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#include <stdio.h>
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#include "test/IxNpeDlTestReg.h"
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#else
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#include "IxOsal.h"
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#endif
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/*
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* Typedefs
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*/
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/**
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* @typedef IxNpeDlTraceTypes
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* @brief Enumeration defining IxNpeDl trace levels
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*/
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typedef enum
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{
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IX_NPEDL_TRACE_OFF, /**< no trace */
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IX_NPEDL_DEBUG, /**< debug */
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IX_NPEDL_FN_ENTRY_EXIT /**< function entry/exit */
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} IxNpeDlTraceTypes;
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/*
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* #defines and macros.
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*/
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/* Implementation of the following macros for use with IxNpeDl unit test code */
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#if (CPU != XSCALE)
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/**
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* @def IX_NPEDL_TRACE_LEVEL
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*
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* @brief IxNpeDl debug trace level
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*/
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#define IX_NPEDL_TRACE_LEVEL IX_NPEDL_FN_ENTRY_EXIT
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/**
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* @def IX_NPEDL_ERROR_REPORT
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*
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* @brief Mechanism for reporting IxNpeDl software errors
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*
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* @param char* [in] STR - Error string to report
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*
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* This macro simply prints the error string passed.
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* Intended for use with IxNpeDl unit test code.
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*
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* @return none
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*/
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#define IX_NPEDL_ERROR_REPORT(STR) printf ("IxNpeDl ERROR: %s\n", (STR));
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/**
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* @def IX_NPEDL_WARNING_REPORT
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*
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* @brief Mechanism for reporting IxNpeDl software errors
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*
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* @param char* [in] STR - Error string to report
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*
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* This macro simply prints the error string passed.
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* Intended for use with IxNpeDl unit test code.
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*
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* @return none
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*/
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#define IX_NPEDL_WARNING_REPORT(STR) printf ("IxNpeDl WARNING: %s\n", (STR));
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/**
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* @def IX_NPEDL_TRACE0
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*
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* @brief Mechanism for tracing debug for the IxNpeDl component, for no arguments
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*
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* @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
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* @param char* [in] STR - Trace string
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*
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* This macro simply prints the trace string passed, if the level is supported.
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* Intended for use with IxNpeDl unit test code.
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*
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* @return none
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*/
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#define IX_NPEDL_TRACE0(LEVEL, STR) \
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{ \
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if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
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{ \
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printf ("IxNpeDl TRACE: "); \
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printf ((STR)); \
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printf ("\n"); \
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} \
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}
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/**
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* @def IX_NPEDL_TRACE1
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*
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* @brief Mechanism for tracing debug for the IxNpeDl component, with 1 argument
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*
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* @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
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* @param char* [in] STR - Trace string
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* @param argType [in] ARG1 - Argument to trace
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*
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* This macro simply prints the trace string passed, if the level is supported.
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* Intended for use with IxNpeDl unit test code.
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*
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* @return none
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*/
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#define IX_NPEDL_TRACE1(LEVEL, STR, ARG1) \
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{ \
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if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
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{ \
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printf ("IxNpeDl TRACE: "); \
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printf (STR, ARG1); \
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printf ("\n"); \
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} \
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}
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/**
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* @def IX_NPEDL_TRACE2
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*
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* @brief Mechanism for tracing debug for the IxNpeDl component, with 2 arguments
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*
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* @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
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* @param char* [in] STR - Trace string
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* @param argType [in] ARG1 - Argument to trace
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* @param argType [in] ARG2 - Argument to trace
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*
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* This macro simply prints the trace string passed, if the level is supported.
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* Intended for use with IxNpeDl unit test code.
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*
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* @return none
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*/
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#define IX_NPEDL_TRACE2(LEVEL, STR, ARG1, ARG2) \
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{ \
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if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
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{ \
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printf ("IxNpeDl TRACE: "); \
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printf (STR, ARG1, ARG2); \
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printf ("\n"); \
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} \
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}
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/**
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* @def IX_NPEDL_REG_WRITE
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*
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* @brief Mechanism for writing to a memory-mapped register
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*
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* @param UINT32 [in] base - Base memory address for this NPE's registers
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* @param UINT32 [in] offset - Offset from base memory address
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* @param UINT32 [in] value - Value to write to register
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*
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* This macro calls a function from Unit Test code to write a register. This
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* allows extra flexibility for unit testing of the IxNpeDl component.
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*
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* @return none
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*/
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#define IX_NPEDL_REG_WRITE(base, offset, value) \
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{ \
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ixNpeDlTestRegWrite (base, offset, value); \
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}
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/**
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* @def IX_NPEDL_REG_READ
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*
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* @brief Mechanism for reading from a memory-mapped register
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*
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* @param UINT32 [in] base - Base memory address for this NPE's registers
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* @param UINT32 [in] offset - Offset from base memory address
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* @param UINT32 *[out] value - Value read from register
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*
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* This macro calls a function from Unit Test code to read a register. This
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* allows extra flexibility for unit testing of the IxNpeDl component.
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*
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* @return none
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*/
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#define IX_NPEDL_REG_READ(base, offset, value) \
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{ \
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ixNpeDlTestRegRead (base, offset, value); \
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}
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/* Implementation of the following macros when integrated with IxOsal */
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#else /* #if (CPU != XSCALE) */
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/**
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* @def IX_NPEDL_TRACE_LEVEL
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*
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* @brief IxNpeDl debug trace level
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*/
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#define IX_NPEDL_TRACE_LEVEL IX_NPEDL_DEBUG
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/**
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* @def IX_NPEDL_ERROR_REPORT
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*
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* @brief Mechanism for reporting IxNpeDl software errors
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*
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* @param char* [in] STR - Error string to report
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*
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* This macro is used to report IxNpeDl software errors.
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*
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* @return none
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*/
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#define IX_NPEDL_ERROR_REPORT(STR) \
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ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, STR, 0, 0, 0, 0, 0, 0);
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/**
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* @def IX_NPEDL_WARNING_REPORT
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*
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* @brief Mechanism for reporting IxNpeDl software warnings
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*
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* @param char* [in] STR - Warning string to report
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*
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* This macro is used to report IxNpeDl software warnings.
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*
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* @return none
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*/
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#define IX_NPEDL_WARNING_REPORT(STR) \
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ixOsalLog (IX_OSAL_LOG_LVL_WARNING, IX_OSAL_LOG_DEV_STDOUT, STR, 0, 0, 0, 0, 0, 0);
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/**
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* @def IX_NPEDL_TRACE0
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*
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* @brief Mechanism for tracing debug for the IxNpeDl component, for no arguments
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*
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* @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
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* @param char* [in] STR - Trace string
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*
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* This macro simply prints the trace string passed, if the level is supported.
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*
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* @return none
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*/
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#define IX_NPEDL_TRACE0(LEVEL, STR) \
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{ \
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if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
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{ \
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if (LEVEL == IX_NPEDL_FN_ENTRY_EXIT) \
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{ \
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ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3, IX_OSAL_LOG_DEV_STDOUT, STR, 0, 0, 0, 0, 0, 0); \
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} \
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else if (LEVEL == IX_NPEDL_DEBUG) \
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{ \
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ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, STR, 0, 0, 0, 0, 0, 0); \
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} \
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} \
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}
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/**
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* @def IX_NPEDL_TRACE1
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*
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* @brief Mechanism for tracing debug for the IxNpeDl component, with 1 argument
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*
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* @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
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* @param char* [in] STR - Trace string
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* @param argType [in] ARG1 - Argument to trace
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*
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* This macro simply prints the trace string passed, if the level is supported.
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*
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* @return none
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*/
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#define IX_NPEDL_TRACE1(LEVEL, STR, ARG1) \
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{ \
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if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
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{ \
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if (LEVEL == IX_NPEDL_FN_ENTRY_EXIT) \
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{ \
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ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, 0, 0, 0, 0, 0); \
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} \
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else if (LEVEL == IX_NPEDL_DEBUG) \
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{ \
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ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, 0, 0, 0, 0, 0); \
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} \
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} \
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}
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/**
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* @def IX_NPEDL_TRACE2
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*
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* @brief Mechanism for tracing debug for the IxNpeDl component, with 2 arguments
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*
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* @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
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* @param char* [in] STR - Trace string
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* @param argType [in] ARG1 - Argument to trace
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* @param argType [in] ARG2 - Argument to trace
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*
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* This macro simply prints the trace string passed, if the level is supported.
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*
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* @return none
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*/
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#define IX_NPEDL_TRACE2(LEVEL, STR, ARG1, ARG2) \
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{ \
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if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
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{ \
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if (LEVEL == IX_NPEDL_FN_ENTRY_EXIT) \
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{ \
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ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, ARG2, 0, 0, 0, 0); \
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} \
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else if (LEVEL == IX_NPEDL_DEBUG) \
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{ \
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ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, ARG2, 0, 0, 0, 0); \
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} \
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} \
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}
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/**
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* @def IX_NPEDL_REG_WRITE
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*
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* @brief Mechanism for writing to a memory-mapped register
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*
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* @param UINT32 [in] base - Base memory address for this NPE's registers
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* @param UINT32 [in] offset - Offset from base memory address
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* @param UINT32 [in] value - Value to write to register
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*
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* This macro forms the address of the register from base address + offset, and
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* dereferences that address to write the contents of the register.
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*
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* @return none
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*/
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#define IX_NPEDL_REG_WRITE(base, offset, value) \
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IX_OSAL_WRITE_LONG(((base) + (offset)), (value))
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/**
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* @def IX_NPEDL_REG_READ
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*
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* @brief Mechanism for reading from a memory-mapped register
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*
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* @param UINT32 [in] base - Base memory address for this NPE's registers
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* @param UINT32 [in] offset - Offset from base memory address
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* @param UINT32 *[out] value - Value read from register
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*
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* This macro forms the address of the register from base address + offset, and
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* dereferences that address to read the register contents.
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*
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* @return none
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*/
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#define IX_NPEDL_REG_READ(base, offset, value) \
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*(value) = IX_OSAL_READ_LONG(((base) + (offset)))
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#endif /* #if (CPU != XSCALE) */
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#endif /* IXNPEDLMACROS_P_H */
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/**
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* @} defgroup IxNpeDlMacros_p
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*/
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