upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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127 lines
2.7 KiB
127 lines
2.7 KiB
/*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <watchdog.h>
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#ifdef CONFIG_M5272
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#include <asm/m5272.h>
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#endif
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#ifdef CONFIG_M5282
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#include <asm/m5282.h>
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#endif
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#include <asm/mcftimer.h>
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#include <asm/processor.h>
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#include <commproc.h>
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static ulong timestamp;
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static unsigned short lastinc;
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void coldfire_timer_init (void)
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{
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volatile unsigned short *timerp;
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timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE4);
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timestamp = 0;
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#ifdef CONFIG_M5272
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/* Set up TIMER 4 as poll clock */
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timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE;
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timerp[MCFTIMER_TRR] = lastinc = 0;
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timerp[MCFTIMER_TMR] = (65 << 8) | MCFTIMER_TMR_CLK1 |
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MCFTIMER_TMR_FREERUN | MCFTIMER_TMR_ENABLE;
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#endif
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#ifdef CONFIG_M5282
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/* Set up TIMER 4 as poll clock */
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timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW;
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timerp[MCFTIMER_PMR] = lastinc = 0;
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timerp[MCFTIMER_PCSR] =
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(5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
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#endif
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}
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void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg)
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{
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}
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void irq_free_handler (int vec)
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{
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}
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int interrupt_init (void)
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{
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coldfire_timer_init ();
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return 0;
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}
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void enable_interrupts ()
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{
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}
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int disable_interrupts ()
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{
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return 0;
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}
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void set_timer (ulong t)
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{
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volatile unsigned short *timerp;
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timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE4);
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timestamp = 0;
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#ifdef CONFIG_M5272
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timerp[MCFTIMER_TRR] = lastinc = 0;
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#endif
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#ifdef CONFIG_M5282
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timerp[MCFTIMER_PMR] = lastinc = 0;
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#endif
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}
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ulong get_timer (ulong base)
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{
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unsigned short now, diff;
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volatile unsigned short *timerp;
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timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE4);
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#ifdef CONFIG_M5272
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now = timerp[MCFTIMER_TCN];
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diff = (now - lastinc);
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#endif
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#ifdef CONFIG_M5282
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now = timerp[MCFTIMER_PCNTR];
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diff = -(now - lastinc);
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#endif
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timestamp += diff;
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lastinc = now;
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return timestamp - base;
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}
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void wait_ticks (unsigned long ticks)
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{
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set_timer (0);
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while (get_timer (0) < ticks);
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}
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