upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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42 lines
1.1 KiB
42 lines
1.1 KiB
NVIDIA Tegra186 BPMP I2C controller
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In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW
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devices, such as the I2C controller for the power management I2C bus. Software
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running on other CPUs must perform IPC to the BPMP in order to execute
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transactions on that I2C bus. This binding describes an I2C bus that is
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accessed in such a fashion.
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The BPMP I2C node must be located directly inside the main BPMP node. See
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../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding.
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This node represents an I2C controller. See ../i2c/i2c.txt for details of the
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core I2C binding.
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Required properties:
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- compatible:
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Array of strings.
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One of:
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- "nvidia,tegra186-bpmp-i2c".
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- #address-cells: Address cells for I2C device address.
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Single-cell integer.
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Must be <1>.
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- #size-cells:
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Single-cell integer.
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Must be <0>.
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- nvidia,bpmp-bus-id:
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Single-cell integer.
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Indicates the I2C bus number this DT node represent, as defined by the
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BPMP firmware.
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Example:
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bpmp {
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...
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i2c {
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compatible = "nvidia,tegra186-bpmp-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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nvidia,bpmp-bus-id = <5>;
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};
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};
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