upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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105 lines
3.0 KiB
105 lines
3.0 KiB
/*
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* DaVinci pinmux functions.
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*
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* Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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* Copyright (C) 2008 Lyrtech <www.lyrtech.com>
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* Copyright (C) 2004 Texas Instruments.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <asm/arch/hardware.h>
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#include <asm/io.h>
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#include <asm/arch/davinci_misc.h>
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/*
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* Change the setting of a pin multiplexer field.
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*
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* Takes an array of pinmux settings similar to:
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*
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* struct pinmux_config uart_pins[] = {
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* { &davinci_syscfg_regs->pinmux[8], 2, 7 },
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* { &davinci_syscfg_regs->pinmux[9], 2, 0 }
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* };
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*
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* Stepping through the array, each pinmux[n] register has the given value
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* set in the pin mux field specified.
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*
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* The number of pins in the array must be passed (ARRAY_SIZE can provide
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* this value conveniently).
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*
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* Returns 0 if all field numbers and values are in the correct range,
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* else returns -1.
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*/
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int davinci_configure_pin_mux(const struct pinmux_config *pins,
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const int n_pins)
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{
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int i;
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/* check for invalid pinmux values */
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for (i = 0; i < n_pins; i++) {
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if (pins[i].field >= PIN_MUX_NUM_FIELDS ||
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(pins[i].value & ~PIN_MUX_FIELD_MASK) != 0)
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return -1;
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}
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/* configure the pinmuxes */
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for (i = 0; i < n_pins; i++) {
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const int offset = pins[i].field * PIN_MUX_FIELD_SIZE;
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const unsigned int value = pins[i].value << offset;
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const unsigned int mask = PIN_MUX_FIELD_MASK << offset;
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const dv_reg *mux = pins[i].mux;
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writel(value | (readl(mux) & (~mask)), mux);
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}
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return 0;
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}
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/*
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* Configure multiple pinmux resources.
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*
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* Takes an pinmux_resource array of pinmux_config and pin counts:
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*
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* const struct pinmux_resource pinmuxes[] = {
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* PINMUX_ITEM(uart_pins),
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* PINMUX_ITEM(i2c_pins),
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* };
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*
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* The number of items in the array must be passed (ARRAY_SIZE can provide
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* this value conveniently).
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*
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* Each item entry is configured in the defined order. If configuration
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* of any item fails, -1 is returned and none of the following items are
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* configured. On success, 0 is returned.
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*/
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int davinci_configure_pin_mux_items(const struct pinmux_resource *item,
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const int n_items)
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{
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int i;
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for (i = 0; i < n_items; i++) {
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if (davinci_configure_pin_mux(item[i].pins,
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item[i].n_pins) != 0)
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return -1;
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}
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return 0;
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}
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