upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Simon Glass d188b18f65 x86: Refactor PCI to permit alternate init ... We want access PCI earlier in the init sequence, so refactor the code so that it does not require use of a BSS variable to work. This will allow us to use early malloc() to store information about a PCI hose. Common PCI code moves to arch/x86/cpu/pci.c and a new board_pci_setup_hose() function is provided by boards to set up the (single) hose used by that board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		11 years ago
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cpu	x86: Refactor PCI to permit alternate init	11 years ago
dts	x86: Add chromebook_link board	11 years ago
include/asm	x86: Refactor PCI to permit alternate init	11 years ago
lib	x86: Allow timer calibration to work on ivybridge	11 years ago
Kconfig	x86: chromebook_link: Implement CAR support (cache as RAM)	11 years ago
config.mk	x86: Remove REALMODE_BASE which is no longer used	11 years ago