upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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71 lines
1.5 KiB
71 lines
1.5 KiB
/*
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* Copyright (C) 2015, Google, Inc
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <malloc.h>
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#include <mapmem.h>
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#include <sdhci.h>
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#include <asm/pci.h>
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struct pci_mmc_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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};
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struct pci_mmc_priv {
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struct sdhci_host host;
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void *base;
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};
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static int pci_mmc_probe(struct udevice *dev)
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{
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct pci_mmc_plat *plat = dev_get_platdata(dev);
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struct pci_mmc_priv *priv = dev_get_priv(dev);
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struct sdhci_host *host = &priv->host;
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u32 ioaddr;
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int ret;
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dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &ioaddr);
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host->ioaddr = map_sysmem(ioaddr, 0);
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host->name = dev->name;
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ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
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if (ret)
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return ret;
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host->mmc = &plat->mmc;
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host->mmc->priv = &priv->host;
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host->mmc->dev = dev;
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upriv->mmc = host->mmc;
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return sdhci_probe(dev);
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}
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static int pci_mmc_bind(struct udevice *dev)
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{
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struct pci_mmc_plat *plat = dev_get_platdata(dev);
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return sdhci_bind(dev, &plat->mmc, &plat->cfg);
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}
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U_BOOT_DRIVER(pci_mmc) = {
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.name = "pci_mmc",
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.id = UCLASS_MMC,
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.bind = pci_mmc_bind,
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.probe = pci_mmc_probe,
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.ops = &sdhci_ops,
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.priv_auto_alloc_size = sizeof(struct pci_mmc_priv),
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.platdata_auto_alloc_size = sizeof(struct pci_mmc_plat),
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};
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static struct pci_device_id mmc_supported[] = {
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{ PCI_DEVICE_CLASS(PCI_CLASS_SYSTEM_SDHCI << 8, 0xffff00) },
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{},
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};
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U_BOOT_PCI_DEVICE(pci_mmc, mmc_supported);
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