upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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61 lines
1.1 KiB
61 lines
1.1 KiB
/*
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* Copyright (c) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <pch.h>
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DECLARE_GLOBAL_DATA_PTR;
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int pch_get_spi_base(struct udevice *dev, ulong *sbasep)
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{
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struct pch_ops *ops = pch_get_ops(dev);
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*sbasep = 0;
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if (!ops->get_spi_base)
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return -ENOSYS;
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return ops->get_spi_base(dev, sbasep);
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}
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int pch_set_spi_protect(struct udevice *dev, bool protect)
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{
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struct pch_ops *ops = pch_get_ops(dev);
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if (!ops->set_spi_protect)
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return -ENOSYS;
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return ops->set_spi_protect(dev, protect);
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}
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int pch_get_gpio_base(struct udevice *dev, u32 *gbasep)
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{
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struct pch_ops *ops = pch_get_ops(dev);
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*gbasep = 0;
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if (!ops->get_gpio_base)
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return -ENOSYS;
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return ops->get_gpio_base(dev, gbasep);
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}
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int pch_get_io_base(struct udevice *dev, u32 *iobasep)
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{
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struct pch_ops *ops = pch_get_ops(dev);
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*iobasep = 0;
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if (!ops->get_io_base)
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return -ENOSYS;
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return ops->get_io_base(dev, iobasep);
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}
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UCLASS_DRIVER(pch) = {
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.id = UCLASS_PCH,
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.name = "pch",
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.post_bind = dm_scan_fdt_dev,
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};
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