upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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126 lines
3.7 KiB
126 lines
3.7 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* IO header file
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*
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* Copyright (C) 2001-2007 Tensilica Inc.
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* Based on the Linux/Xtensa version of this header.
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*/
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#ifndef _XTENSA_IO_H
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#define _XTENSA_IO_H
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#include <linux/types.h>
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#include <asm/byteorder.h>
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/*
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* swap functions to change byte order from little-endian to big-endian and
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* vice versa.
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*/
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static inline unsigned short _swapw(unsigned short v)
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{
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return (v << 8) | (v >> 8);
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}
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static inline unsigned int _swapl(unsigned int v)
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{
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return (v << 24) | ((v & 0xff00) << 8) |
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((v >> 8) & 0xff00) | (v >> 24);
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}
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/*
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* Generic I/O
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*/
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#define readb(addr) \
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({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; })
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#define readw(addr) \
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({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; })
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#define readl(addr) \
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({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; })
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#define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b))
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#define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b))
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#define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b))
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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/* These are the definitions for the x86 IO instructions
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* inb/inw/inl/outb/outw/outl, the "string" versions
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* insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
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* inb_p/inw_p/...
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* The macros don't do byte-swapping.
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*/
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#define inb(port) readb((u8 *)((port)))
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#define outb(val, port) writeb((val), (u8 *)((unsigned long)(port)))
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#define inw(port) readw((u16 *)((port)))
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#define outw(val, port) writew((val), (u16 *)((unsigned long)(port)))
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#define inl(port) readl((u32 *)((port)))
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#define outl(val, port) writel((val), (u32 *)((unsigned long)(port)))
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#define inb_p(port) inb((port))
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#define outb_p(val, port) outb((val), (port))
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#define inw_p(port) inw((port))
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#define outw_p(val, port) outw((val), (port))
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#define inl_p(port) inl((port))
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#define outl_p(val, port) outl((val), (port))
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void insb(unsigned long port, void *dst, unsigned long count);
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void insw(unsigned long port, void *dst, unsigned long count);
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void insl(unsigned long port, void *dst, unsigned long count);
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void outsb(unsigned long port, const void *src, unsigned long count);
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void outsw(unsigned long port, const void *src, unsigned long count);
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void outsl(unsigned long port, const void *src, unsigned long count);
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#define IO_SPACE_LIMIT ~0
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#define memset_io(a, b, c) memset((void *)(a), (b), (c))
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#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
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#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
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/* At this point the Xtensa doesn't provide byte swap instructions */
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#ifdef __XTENSA_EB__
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# define in_8(addr) (*(u8 *)(addr))
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# define in_le16(addr) _swapw(*(u16 *)(addr))
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# define in_le32(addr) _swapl(*(u32 *)(addr))
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# define out_8(b, addr) *(u8 *)(addr) = (b)
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# define out_le16(b, addr) *(u16 *)(addr) = _swapw(b)
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# define out_le32(b, addr) *(u32 *)(addr) = _swapl(b)
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#elif defined(__XTENSA_EL__)
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# define in_8(addr) (*(u8 *)(addr))
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# define in_le16(addr) (*(u16 *)(addr))
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# define in_le32(addr) (*(u32 *)(addr))
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# define out_8(b, addr) *(u8 *)(addr) = (b)
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# define out_le16(b, addr) *(u16 *)(addr) = (b)
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# define out_le32(b, addr) *(u32 *)(addr) = (b)
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#else
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# error processor byte order undefined!
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#endif
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem access
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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/*
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* Dummy function to keep U-Boot's cfi_flash.c driver happy.
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*/
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static inline void sync(void)
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{
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}
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#include <asm-generic/io.h>
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#endif /* _XTENSA_IO_H */
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