upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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179 lines
5.3 KiB
179 lines
5.3 KiB
/*
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* (C) Copyright 2009 DENX Software Engineering
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* Author: John Rigby <jrigby@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* KARO TX25 board - SoC Configuration
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*/
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#define CONFIG_MX25
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#define CONFIG_MX25_CLK32 32000 /* OSC32K frequency */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
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/* NAND BOOT is the only boot method */
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#define CONFIG_NAND_U_BOOT
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#ifndef MACH_TYPE_TX25
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#define MACH_TYPE_TX25 2177
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#endif
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#define CONFIG_MACH_TYPE MACH_TYPE_TX25
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#ifdef CONFIG_NAND_SPL
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/* Start copying real U-boot from the second page */
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x30000
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#define CONFIG_SYS_NAND_U_BOOT_DST (0x81200000)
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_SPARE_SIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_SIZE (128 * 1024 * 1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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#else
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/*
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* Memory Info
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*/
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/* malloc() len */
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#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
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/*
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* Board has 2 32MB banks of DRAM but there is a bug when using
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* both so only the first is configured
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 0x80000000
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#define PHYS_SDRAM_1_SIZE 0x02000000
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#if (CONFIG_NR_DRAM_BANKS == 2)
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#define PHYS_SDRAM_2 0x90000000
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#define PHYS_SDRAM_2_SIZE 0x02000000
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#endif
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/* 8MB DRAM test */
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
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#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
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/*
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* Serial Info
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*/
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
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#define CONFIG_BAUDRATE 115200 /* Default baud rate */
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#define CONFIG_MXC_GPIO
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/*
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* Flash & Environment
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*/
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/* No NOR flash present */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
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#define CONFIG_ENV_SIZE (128 * 1024) /* 128 kB NAND block size */
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
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/* NAND */
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#define CONFIG_NAND_MXC
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#define CONFIG_MXC_NAND_REGS_BASE (0xBB000000)
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE (0xBB000000)
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#define CONFIG_JFFS2_NAND
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#define CONFIG_MXC_NAND_HWECC
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#define CONFIG_SYS_NAND_LARGEPAGE
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/* U-Boot general configuration */
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#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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/* Print buffer sz */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_LONGHELP
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/* U-Boot commands */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_CACHE
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/*
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* Ethernet
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*/
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#define CONFIG_FEC_MXC
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#define CONFIG_FEC_MXC_PHYADDR 0x1f
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#define CONFIG_MII
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#define CONFIG_CMD_NET
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"addip=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"addtty=setenv bootargs ${bootargs}" \
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" console=ttymxc0,${baudrate}\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"addmisc=setenv bootargs ${bootargs}\0" \
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"u-boot=tx25/u-boot.bin\0" \
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"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
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"hostname=tx25\0" \
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"bootfile=tx25/uImage\0" \
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"rootpath=/opt/eldk/arm\0" \
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"net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
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"run nfsargs addip addtty addmtd addmisc;" \
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"bootm\0" \
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"bootcmd=run net_nfs\0" \
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"load=tftp ${loadaddr} ${u-boot}\0" \
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"update=nand erase 0 40000;nand write ${loadaddr} 0 40000\0" \
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"upd=run load update\0" \
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/* additions for new relocation code, must be added to all boards */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
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GENERATED_GBL_DATA_SIZE)
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#endif /* __CONFIG_H */
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