upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/arch/arm/dts/tegra20-ventana.dts

95 lines
1.6 KiB

/dts-v1/;
#include "tegra20.dtsi"
/ {
model = "NVIDIA Tegra20 Ventana evaluation board";
compatible = "nvidia,ventana", "nvidia,tegra20";
chosen {
stdout-path = &uartd;
};
aliases {
usb0 = "/usb@c5008000";
sdhci0 = "/sdhci@c8000600";
sdhci1 = "/sdhci@c8000400";
};
memory {
reg = <0x00000000 0x40000000>;
};
host1x {
status = "okay";
dc@54200000 {
status = "okay";
rgb {
status = "okay";
nvidia,panel = <&lcd_panel>;
};
};
};
serial@70006300 {
clock-frequency = < 216000000 >;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
status = "disabled";
};
usb@c5000000 {
status = "disabled";
};
usb@c5004000 {
status = "disabled";
};
sdhci@c8000400 {
status = "okay";
cd-gpios = <&gpio 69 1>; /* gpio PI5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 70 0>; /* gpio PI6 */
bus-width = <4>;
};
sdhci@c8000600 {
status = "okay";
bus-width = <8>;
};
lcd_panel: panel {
clock = <72072000>;
xres = <1366>;
yres = <768>;
left-margin = <58>;
right-margin = <58>;
hsync-len = <58>;
lower-margin = <4>;
upper-margin = <4>;
vsync-len = <4>;
hsync-active-high;
vsync-active-high;
nvidia,bits-per-pixel = <16>;
nvidia,pwm = <&pwm 2 0>;
nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
nvidia,panel-timings = <0 0 200 0 0>;
};
};