upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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109 lines
3.2 KiB
109 lines
3.2 KiB
/*
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* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "stm32h743.dtsi"
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#include "stm32h743-pinctrl.dtsi"
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#include <dt-bindings/memory/stm32-sdram.h>
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/ {
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model = "STMicroelectronics STM32H743i-EVAL board";
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compatible = "st,stm32h743i-eval", "st,stm32h743";
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chosen {
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bootargs = "root=/dev/ram";
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stdout-path = "serial0:115200n8";
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};
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memory {
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reg = <0xd0000000 0x2000000>;
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};
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aliases {
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serial0 = &usart1;
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gpio0 = &gpioa;
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gpio1 = &gpiob;
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gpio2 = &gpioc;
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gpio3 = &gpiod;
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gpio4 = &gpioe;
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gpio5 = &gpiof;
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gpio6 = &gpiog;
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gpio7 = &gpioh;
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gpio8 = &gpioi;
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gpio9 = &gpioj;
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gpio10 = &gpiok;
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};
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};
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&usart1 {
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pinctrl-0 = <&usart1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&fmc {
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pinctrl-0 = <&fmc_pins>;
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pinctrl-names = "default";
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status = "okay";
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/*
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* Memory configuration from sdram datasheet IS42S32800G-6BLI
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* firsct bank is bank@0
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* second bank is bank@1
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*/
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bank2: bank@1 {
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st,sdram-control = /bits/ 8 <NO_COL_9 NO_ROW_12 MWIDTH_32 BANKS_4
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CAS_2 SDCLK_3 RD_BURST_EN RD_PIPE_DL_0>;
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st,sdram-timing = /bits/ 8 <TMRD_1 TXSR_1 TRAS_1 TRC_6 TRP_2
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TWR_1 TRCD_1>;
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st,sdram-refcount = <1539>;
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};
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};
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&sdmmc1 {
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status = "okay";
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pinctrl-0 = <&sdmmc1_pins>,
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<&pinctrl_sdmmc1_level_shifter>;
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pinctrl-names = "default";
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bus-width = <4>;
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st,dirpol;
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};
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