upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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74 lines
2.5 KiB
74 lines
2.5 KiB
if ARM64
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config ARMV8_MULTIENTRY
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bool "Enable multiple CPUs to enter into U-Boot"
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config ARMV8_SPIN_TABLE
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bool "Support spin-table enable method"
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depends on ARMV8_MULTIENTRY && OF_LIBFDT
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help
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Say Y here to support "spin-table" enable method for booting Linux.
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To use this feature, you must do:
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- Specify enable-method = "spin-table" in each CPU node in the
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Device Tree you are using to boot the kernel
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- Let secondary CPUs in U-Boot (in a board specific manner)
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before the master CPU jumps to the kernel
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U-Boot automatically does:
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- Set "cpu-release-addr" property of each CPU node
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(overwrites it if already exists).
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- Reserve the code for the spin-table and the release address
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via a /memreserve/ region in the Device Tree.
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config PSCI_RESET
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bool "Use PSCI for reset and shutdown"
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default y
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depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \
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!TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
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!TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \
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!TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
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!TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
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!TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
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!ARCH_UNIPHIER && !ARCH_SNAPDRAGON && !TARGET_S32V234EVB
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help
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Most armv8 systems have PSCI support enabled in EL3, either through
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ARM Trusted Firmware or other firmware.
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On these systems, we do not need to implement system reset manually,
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but can instead rely on higher level firmware to deal with it.
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Select Y here to make use of PSCI calls for system reset
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config ARMV8_PSCI
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bool "Enable PSCI support" if EXPERT
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default n
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help
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PSCI is Power State Coordination Interface defined by ARM.
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The PSCI in U-boot provides a general framework and each platform
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can implement their own specific PSCI functions.
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Say Y here to enable PSCI support on ARMv8 platform.
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config ARMV8_PSCI_NR_CPUS
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int "Maximum supported CPUs for PSCI"
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depends on ARMV8_PSCI
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default 4
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help
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The maximum number of CPUs supported in the PSCI firmware.
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It is no problem to set a larger value than the number of CPUs in
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the actual hardware implementation.
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if SYS_HAS_ARMV8_SECURE_BASE
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config ARMV8_SECURE_BASE
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hex "Secure address for PSCI image"
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depends on ARMV8_PSCI
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help
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Address for placing the PSCI text, data and stack sections.
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If not defined, the PSCI sections are placed together with the u-boot
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but platform can choose to place PSCI code image separately in other
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places such as some secure RAM built-in SOC etc.
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endif
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endif
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