upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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104 lines
2.8 KiB
104 lines
2.8 KiB
/*
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* include/configs/blanche.h
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* This file is blanche board configuration.
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*
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* Copyright (C) 2016 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef __BLANCHE_H
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#define __BLANCHE_H
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#undef DEBUG
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#define CONFIG_R8A7792
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#define CONFIG_RMOBILE_BOARD_STRING "Blanche"
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#include "rcar-gen2-common.h"
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/* STACK */
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#define CONFIG_SYS_INIT_SP_ADDR 0xE817FFFC
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#define STACK_AREA_SIZE 0xC000
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#define LOW_LEVEL_MERAM_STACK \
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(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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#define RCAR_GEN2_SDRAM_BASE 0x40000000
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#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
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#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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/* SCIF */
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#define CONFIG_CONS_SCIF0
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#define CONFIG_SYS_MEMTEST_START (RCAR_GEN2_SDRAM_BASE)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 504 * 1024 * 1024)
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#undef CONFIG_SYS_ALT_MEMTEST
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#undef CONFIG_SYS_MEMTEST_SCRATCH
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE
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/* FLASH */
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#if !defined(CONFIG_MTD_NOR_FLASH)
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#define CONFIG_SYS_TEXT_BASE 0x40000000
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#define CONFIG_SPI
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#define CONFIG_SH_QSPI
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#define CONFIG_SH_QSPI_BASE 0xE6B10000
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#else
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#define CONFIG_SYS_TEXT_BASE 0x00000000
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_FLASH_BASE 0x00000000
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#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */
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#define CONFIG_SYS_MAX_FLASH_SECT 1024
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
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#define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) }
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#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
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#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
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#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
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#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
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#undef CONFIG_CMD_SF
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#undef CONFIG_CMD_SPI
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#endif
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
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#define CONFIG_SYS_TMU_CLK_DIV 4
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/* ENV setting */
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#if !defined(CONFIG_MTD_NOR_FLASH)
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#else
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#undef CONFIG_ENV_ADDR
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#define CONFIG_ENV_SECT_SIZE (256 * 1024)
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
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#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN)
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#endif
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/* Module stop status bits */
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/* INTC-RT */
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#define CONFIG_SMSTP0_ENA 0x00400000
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/* SDHI0 */
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#define CONFIG_SMSTP3_ENA 0x00004000
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/* INTC-SYS, IRQC */
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#define CONFIG_SMSTP4_ENA 0x00000180
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/* SCIF0 */
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#define CONFIG_SMSTP7_ENA 0x00200000
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/* QSPI */
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#define CONFIG_SMSTP9_ENA 0x00020000
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/* SYS-DMAC0 */
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#define CONFIG_RMSTP2_ENA 0x00080000
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/* SDHI */
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#define CONFIG_SH_SDHI_FREQ 97500000
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#define HAVE_BLOCK_DEVICE
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#endif /* __BLANCHE_H */
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