upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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119 lines
2.8 KiB
119 lines
2.8 KiB
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
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*
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* (C) Copyright 2003
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* Texas Instruments, <www.ti.com>
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* Kshitij Gupta <Kshitij@ti.com>
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*
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* (C) Copyright 2004
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* ARM Ltd.
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* Philippe Robin, <philippe.robin@arm.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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void flash__init (void);
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void ether__init (void);
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void peripheral_power_enable (void);
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#if defined(CONFIG_SHOW_BOOT_PROGRESS)
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void show_boot_progress(int progress)
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{
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printf("Boot reached stage %d\n", progress);
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}
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#endif
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#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
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static inline void delay (unsigned long loops)
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{
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__asm__ volatile ("1:\n"
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"subs %0, %1, #1\n"
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"bne 1b":"=r" (loops):"0" (loops));
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}
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/*
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* Miscellaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* set clock frequency:
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* VERSATILE_REFCLK is 32KHz
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* VERSATILE_TIMCLK is 1MHz
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*/
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*(volatile unsigned int *)(VERSATILE_SCTL_BASE) |=
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((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) |
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(VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel));
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/* arch number of Versatile Board */
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gd->bd->bi_arch_number = 387;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0x00000100;
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icache_enable ();
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flash__init ();
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ether__init ();
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return 0;
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}
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int misc_init_r (void)
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{
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setenv("verify", "n");
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return (0);
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}
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/******************************
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Routine:
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Description:
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******************************/
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void flash__init (void)
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{
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}
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/*************************************************************
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Routine:ether__init
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Description: take the Ethernet controller out of reset and wait
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for the EEPROM load to complete.
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*************************************************************/
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void ether__init (void)
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{
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}
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/******************************
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Routine:
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Description:
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******************************/
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int dram_init (void)
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{
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return 0;
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}
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