upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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60 lines
1.1 KiB
60 lines
1.1 KiB
/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/sizes.h>
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#include "../init.h"
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#include "../sg-regs.h"
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int ph1_sld3_memconf_init(const struct uniphier_board_data *bd)
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{
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u32 tmp;
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unsigned long size_per_word;
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tmp = readl(SG_MEMCONF);
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tmp &= ~(SG_MEMCONF_CH2_SZ_MASK | SG_MEMCONF_CH2_NUM_MASK);
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switch (bd->dram_ch[2].width) {
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case 16:
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tmp |= SG_MEMCONF_CH2_NUM_1;
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size_per_word = bd->dram_ch[2].size;
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break;
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case 32:
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tmp |= SG_MEMCONF_CH2_NUM_2;
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size_per_word = bd->dram_ch[2].size >> 1;
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break;
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default:
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pr_err("error: unsupported DRAM Ch2 width\n");
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return -EINVAL;
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}
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/* Set DDR size */
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switch (size_per_word) {
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case SZ_64M:
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tmp |= SG_MEMCONF_CH2_SZ_64M;
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break;
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case SZ_128M:
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tmp |= SG_MEMCONF_CH2_SZ_128M;
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break;
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case SZ_256M:
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tmp |= SG_MEMCONF_CH2_SZ_256M;
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break;
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case SZ_512M:
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tmp |= SG_MEMCONF_CH2_SZ_512M;
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break;
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default:
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pr_err("error: unsupported DRAM Ch2 size\n");
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return -EINVAL;
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}
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writel(tmp, SG_MEMCONF);
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return 0;
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}
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