upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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100 lines
2.2 KiB
100 lines
2.2 KiB
/*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* Board-specific low level initialization code. Called at the very end
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* of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
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* initialization required.
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*
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* For _OLDER_ Sonata boards sets up GPIO4 to control NAND WP line. Newer
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* Sonata boards, AFAIK, don't use this so it's just return by default. Ask
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* Visioneering if they reinvented the wheel once again to make sure :)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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.globl dv_board_init
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dv_board_init:
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#ifdef SONATA_BOARD_GPIOWP
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/* Set PINMUX0 to enable GPIO4 */
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ldr r0, _PINMUX0
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ldr r1, GPIO4_EN_MASK
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ldr r2, [r0]
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and r2, r2, r1
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str r2, [r0]
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/* Enable GPIO LPSC module */
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ldr r0, PTSTAT
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gpio_ptstat_loop1:
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ldr r2, [r0]
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tst r2, $0x00000001
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bne gpio_ptstat_loop1
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ldr r1, MDCTL_GPIO
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ldr r2, [r1]
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and r2, r2, $0xfffffff8
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orr r2, r2, $0x00000003
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str r2, [r1]
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orr r2, r2, $0x00000200
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str r2, [r1]
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ldr r1, PTCMD
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mov r2, $0x00000001
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str r2, [r1]
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gpio_ptstat_loop2:
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ldr r2, [r0]
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tst r2, $0x00000001
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bne gpio_ptstat_loop2
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ldr r0, MDSTAT_GPIO
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gpio_mdstat_loop:
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ldr r2, [r0]
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and r2, r2, $0x0000001f
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teq r2, $0x00000003
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bne gpio_mdstat_loop
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/* GPIO4 -> output */
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ldr r0, GPIO_DIR01
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mov r1, $0x10
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ldr r2, [r0]
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bic r2, r2, r0
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str r2, [r0]
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/* Set it to 0 (Write Protect) */
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ldr r0, GPIO_CLR_DATA01
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str r1, [r0]
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#endif
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mov pc, lr
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#ifdef SONATA_BOARD_GPIOWP
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.ltorg
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GPIO4_EN_MASK:
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.word 0xf77fffff
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MDCTL_GPIO:
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.word 0x01c41a68
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MDSTAT_GPIO:
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.word 0x01c41868
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GPIO_DIR01:
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.word 0x01c67010
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GPIO_CLR_DATA01:
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.word 0x01c6701c
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#endif
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