upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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98 lines
1.6 KiB
98 lines
1.6 KiB
/*
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* CF IDE addon card code
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*
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* Enter bugs at http://blackfin.uclinux.org/
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*
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* Copyright (c) 2005-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <config.h>
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#include <asm/blackfin.h>
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void cf_outb(unsigned char val, volatile unsigned char *addr)
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{
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/* "ETHERNET" means the expansion memory banks */
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swap_to(ETHERNET);
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*addr = val;
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SSYNC();
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swap_to(FLASH);
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}
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unsigned char cf_inb(volatile unsigned char *addr)
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{
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unsigned char c;
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swap_to(ETHERNET);
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c = *addr;
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SSYNC();
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swap_to(FLASH);
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return c;
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}
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void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)
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{
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int i;
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swap_to(ETHERNET);
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for (i = 0; i < words; i++) {
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*(sect_buf + i) = *addr;
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SSYNC();
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}
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swap_to(FLASH);
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}
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void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
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{
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int i;
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swap_to(ETHERNET);
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for (i = 0; i < words; i++) {
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*addr = *(sect_buf + i);
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SSYNC();
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}
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swap_to(FLASH);
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}
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/* Definitions used in Compact Flash Boot support */
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#define FIO_EDGE_CF_BITS 0x0000
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#define FIO_POLAR_CF_BITS 0x0000
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#define FIO_EDGE_BITS 0x1E0
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#define FIO_POLAR_BITS 0x160
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/* Compact flash status bits in status register */
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#define CF_STAT_BITS 0x00000060
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void cf_ide_init(void)
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{
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int i, cf_stat;
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/* Check whether CF card is inserted */
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bfin_write_FIO_EDGE(FIO_EDGE_CF_BITS);
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bfin_write_FIO_POLAR(FIO_POLAR_CF_BITS);
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for (i = 0; i < 0x300; i++)
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asm volatile("nop;");
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cf_stat = bfin_read_FIO_FLAG_S() & CF_STAT_BITS;
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bfin_write_FIO_EDGE(FIO_EDGE_BITS);
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bfin_write_FIO_POLAR(FIO_POLAR_BITS);
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if (!cf_stat) {
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for (i = 0; i < 0x3000; i++)
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asm volatile("nop;");
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ide_init();
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}
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}
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