upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

Fabio Estevam edf0093732 mx6: ddr: Allow changing REFSEL and REFR fields ... Currently MX6 SPL DDR initialization hardcodes the REF_SEL and REFR fields of the MDREF register as 1 and 7, respectively for DDR3 and 0 and 3 for LPDDR2. Looking at the MDREF initialization done via DCD we see that boards do need to initialize these fields differently: $ git grep 0x021b0020 board/ board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */ board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800 board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800 board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800 So introduce a mechanism for users to be able to configure REFSEL and REFR fields as needed. Keep all the mx6 SPL users in their current REF_SEL and REFR values, so no functional changes for the existing users. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com>		8 years ago
..
am33xx	ARM: am33xx: Always inhibit init/refresh during DDR phy init	8 years ago
bcm235xx	arm: bcm235xx: update clock framework	8 years ago
bcm281xx	…
bcmcygnus	…
bcmnsp	…
iproc-common	…
kona-common	board: arm:: Add support for Broadcom BCM23550	8 years ago
ls102xa	ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention	8 years ago
mx5	…
mx6	mx6: ddr: Allow changing REFSEL and REFR fields	8 years ago
mx7	Merge branch 'master' of git://www.denx.de/git/u-boot-imx	8 years ago
omap-common	ARM: OMAP4+: vcores: Remove duplicated code	8 years ago
omap3	omap3: Drop omap3_evm_quick_* targets	8 years ago
omap4	…
omap5	ARM: OMAP5+: vcores: Drop unnecessary #ifndefs	8 years ago
s5p-common	exynos: pwm: Add a driver for the exynos5 PWM	8 years ago
stv0991	…
sunxi	ARM: Rework and correct barrier definitions	8 years ago
vf610	…
Kconfig	kconfig: use bool instead of boolean for type definition attributes	8 years ago
Makefile	ARM: PSCI: Add helper functions to access per-CPU target PC storage	8 years ago
arch_timer.c	…
cache_v7.c	ARM: Rework and correct barrier definitions	8 years ago
cache_v7_asm.S	…
config.mk	…
cp15.c	…
cpu.c	…
lowlevel_init.S	…
nonsec_virt.S	ARM: PSCI: Split out common stack setup code from psci_arch_init	8 years ago
psci-common.c	ARM: Rework and correct barrier definitions	8 years ago
psci.S	ARMv7: PSCI: add PSCI v1.0 functions skeleton	8 years ago
start.S	arm: Allow skipping of low-level init with I-cache on	8 years ago
syslib.c	…
virt-dt.c	ARMv8/PSCI: Fixup the device tree for PSCI	8 years ago
virt-v7.c	ARM: non-sec: flush code cacheline aligned	8 years ago