upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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53 lines
1.1 KiB
53 lines
1.1 KiB
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __SANDBOX_ASM_IO_H
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#define __SANDBOX_ASM_IO_H
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/*
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* Given a physical address and a length, return a virtual address
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* that can be used to access the memory range with the caching
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* properties specified by "flags".
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*/
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#define MAP_NOCACHE (0)
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#define MAP_WRCOMBINE (0)
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#define MAP_WRBACK (0)
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#define MAP_WRTHROUGH (0)
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void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags);
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/*
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* Take down a mapping set up by map_physmem().
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*/
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static inline void unmap_physmem(void *vaddr, unsigned long flags)
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{
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}
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/* For sandbox, we want addresses to point into our RAM buffer */
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static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
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{
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return map_physmem(paddr, len, MAP_WRBACK);
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}
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static inline void unmap_sysmem(const void *vaddr)
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{
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}
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/* Map from a pointer to our RAM buffer */
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phys_addr_t map_to_sysmem(const void *ptr);
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/* Define nops for sandbox I/O access */
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#define readb(addr) 0
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#define readw(addr) 0
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#define readl(addr) 0
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#define writeb(v, addr)
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#define writew(v, addr)
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#define writel(v, addr)
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#include <iotrace.h>
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#endif
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