upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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68 lines
1.1 KiB
68 lines
1.1 KiB
/*
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* MSMC controller utilities
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*
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* (C) Copyright 2012-2014
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* Texas Instruments Incorporated, <www.ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/hardware.h>
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struct mpax {
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u32 mpaxl;
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u32 mpaxh;
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};
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struct msms_regs {
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u32 pid;
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u32 _res_04;
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u32 smcerrar;
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u32 smcerrxr;
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u32 smedcc;
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u32 smcea;
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u32 smsecc;
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u32 smpfar;
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u32 smpfxr;
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u32 smpfr;
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u32 smpfcr;
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u32 _res_2c;
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u32 sbndc[8];
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u32 sbndm;
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u32 sbnde;
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u32 _res_58;
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u32 cfglck;
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u32 cfgulck;
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u32 cfglckstat;
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u32 sms_mpax_lck;
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u32 sms_mpax_ulck;
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u32 sms_mpax_lckstat;
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u32 ses_mpax_lck;
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u32 ses_mpax_ulck;
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u32 ses_mpax_lckstat;
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u32 smestat;
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u32 smirstat;
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u32 smirc;
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u32 smiestat;
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u32 smiec;
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u32 _res_94_c0[12];
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u32 smncerrar;
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u32 smncerrxr;
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u32 smncea;
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u32 _res_d0_1fc[76];
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struct mpax sms[16][8];
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struct mpax ses[16][8];
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};
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void share_all_segments(int priv_id)
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{
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struct msms_regs *msmc = (struct msms_regs *)K2HK_MSMC_CTRL_BASE;
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int j;
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for (j = 0; j < 8; j++) {
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msmc->sms[priv_id][j].mpaxh &= 0xffffff7ful;
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msmc->ses[priv_id][j].mpaxh &= 0xffffff7ful;
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}
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}
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