upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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67 lines
4.0 KiB
67 lines
4.0 KiB
/*
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* SPI Masks
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*/
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#ifndef __BFIN_PERIPHERAL_SPI__
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#define __BFIN_PERIPHERAL_SPI__
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/* SPI_CTL Masks */
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#define TIMOD 0x0003 /* Transfer Initiate Mode */
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#define RDBR_CORE 0x0000 /* RDBR Read Initiates, IRQ When RDBR Full */
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#define TDBR_CORE 0x0001 /* TDBR Write Initiates, IRQ When TDBR Empty */
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#define RDBR_DMA 0x0002 /* DMA Read, DMA Until FIFO Empty */
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#define TDBR_DMA 0x0003 /* DMA Write, DMA Until FIFO Full */
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#define SZ 0x0004 /* Send Zero (When TDBR Empty, Send Zero/Last*) */
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#define GM 0x0008 /* Get More (When RDBR Full, Overwrite/Discard*) */
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#define PSSE 0x0010 /* Slave-Select Input Enable */
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#define EMISO 0x0020 /* Enable MISO As Output */
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#define SIZE 0x0100 /* Size of Words (16/8* Bits) */
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#define LSBF 0x0200 /* LSB First */
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#define CPHA 0x0400 /* Clock Phase */
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#define CPOL 0x0800 /* Clock Polarity */
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#define MSTR 0x1000 /* Master/Slave* */
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#define WOM 0x2000 /* Write Open Drain Master */
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#define SPE 0x4000 /* SPI Enable */
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/* SPI_FLG Masks */
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#define FLS1 0x0002 /* Enables (=1) SPI_FLOUT1 as flag output for SPI Slave-select */
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#define FLS2 0x0004 /* Enables (=1) SPI_FLOUT2 as flag output for SPI Slave-select */
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#define FLS3 0x0008 /* Enables (=1) SPI_FLOUT3 as flag output for SPI Slave-select */
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#define FLS4 0x0010 /* Enables (=1) SPI_FLOUT4 as flag output for SPI Slave-select */
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#define FLS5 0x0020 /* Enables (=1) SPI_FLOUT5 as flag output for SPI Slave-select */
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#define FLS6 0x0040 /* Enables (=1) SPI_FLOUT6 as flag output for SPI Slave-select */
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#define FLS7 0x0080 /* Enables (=1) SPI_FLOUT7 as flag output for SPI Slave-select */
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#define FLG1 0x0200 /* Activates (=0) SPI_FLOUT1 as flag output for SPI Slave-select */
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#define FLG2 0x0400 /* Activates (=0) SPI_FLOUT2 as flag output for SPI Slave-select */
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#define FLG3 0x0800 /* Activates (=0) SPI_FLOUT3 as flag output for SPI Slave-select */
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#define FLG4 0x1000 /* Activates (=0) SPI_FLOUT4 as flag output for SPI Slave-select */
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#define FLG5 0x2000 /* Activates (=0) SPI_FLOUT5 as flag output for SPI Slave-select */
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#define FLG6 0x4000 /* Activates (=0) SPI_FLOUT6 as flag output for SPI Slave-select */
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#define FLG7 0x8000 /* Activates (=0) SPI_FLOUT7 as flag output for SPI Slave-select */
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/* SPI_FLG Bit Positions */
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#define FLS1_P 0x0001 /* Enables (=1) SPI_FLOUT1 as flag output for SPI Slave-select */
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#define FLS2_P 0x0002 /* Enables (=1) SPI_FLOUT2 as flag output for SPI Slave-select */
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#define FLS3_P 0x0003 /* Enables (=1) SPI_FLOUT3 as flag output for SPI Slave-select */
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#define FLS4_P 0x0004 /* Enables (=1) SPI_FLOUT4 as flag output for SPI Slave-select */
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#define FLS5_P 0x0005 /* Enables (=1) SPI_FLOUT5 as flag output for SPI Slave-select */
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#define FLS6_P 0x0006 /* Enables (=1) SPI_FLOUT6 as flag output for SPI Slave-select */
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#define FLS7_P 0x0007 /* Enables (=1) SPI_FLOUT7 as flag output for SPI Slave-select */
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#define FLG1_P 0x0009 /* Activates (=0) SPI_FLOUT1 as flag output for SPI Slave-select */
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#define FLG2_P 0x000A /* Activates (=0) SPI_FLOUT2 as flag output for SPI Slave-select */
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#define FLG3_P 0x000B /* Activates (=0) SPI_FLOUT3 as flag output for SPI Slave-select */
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#define FLG4_P 0x000C /* Activates (=0) SPI_FLOUT4 as flag output for SPI Slave-select */
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#define FLG5_P 0x000D /* Activates (=0) SPI_FLOUT5 as flag output for SPI Slave-select */
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#define FLG6_P 0x000E /* Activates (=0) SPI_FLOUT6 as flag output for SPI Slave-select */
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#define FLG7_P 0x000F /* Activates (=0) SPI_FLOUT7 as flag output for SPI Slave-select */
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/* SPI_STAT Masks */
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#define SPIF 0x0001 /* SPI Finished (Single-Word Transfer Complete) */
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#define MODF 0x0002 /* Mode Fault Error (Another Device Tried To Become Master) */
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#define TXE 0x0004 /* Transmission Error (Data Sent With No New Data In TDBR) */
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#define TXS 0x0008 /* SPI_TDBR Data Buffer Status (Full/Empty*) */
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#define RBSY 0x0010 /* Receive Error (Data Received With RDBR Full) */
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#define RXS 0x0020 /* SPI_RDBR Data Buffer Status (Full/Empty*) */
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#define TXCOL 0x0040 /* Transmit Collision Error (Corrupt Data May Have Been Sent) */
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#endif
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