upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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114 lines
2.8 KiB
114 lines
2.8 KiB
/*
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* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <dm.h>
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#include <dm/device.h>
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#include <dm/root.h>
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#include <dm/test.h>
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#include <dm/util.h>
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#include <power/pmic.h>
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#include <spmi/spmi.h>
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#include <asm/gpio.h>
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#include <test/ut.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Test if bus childs got probed propperly*/
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static int dm_test_spmi_probe(struct unit_test_state *uts)
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{
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const char *name = "spmi@0";
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struct udevice *bus, *dev;
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ut_assertok(uclass_get_device(UCLASS_SPMI, 0, &bus));
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/* Check bus name */
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ut_asserteq_str(name, bus->name);
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/* Check that it has some devices */
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ut_asserteq(device_has_children(bus), true);
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ut_assertok(device_find_first_child(bus, &dev));
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/* There should be at least one child */
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ut_assertnonnull(dev);
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/* Check that only PMICs are connected to the bus */
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while (dev) {
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ut_asserteq(device_get_uclass_id(dev), UCLASS_PMIC);
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device_find_next_child(&dev);
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}
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return 0;
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}
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DM_TEST(dm_test_spmi_probe, DM_TESTF_SCAN_FDT);
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/* Test if it's possible to read bus directly and indirectly */
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static int dm_test_spmi_access(struct unit_test_state *uts)
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{
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const char *pmic_name = "pm8916@0";
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struct udevice *bus, *pmic;
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ut_assertok(uclass_get_device(UCLASS_SPMI, 0, &bus));
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ut_assertok(device_get_child(bus, 0, &pmic));
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/* Sanity check if it's proper PMIC */
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ut_asserteq_str(pmic_name, pmic->name);
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/* Read PMIC ID reg using SPMI bus - it assumes it has slaveID == 0*/
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ut_asserteq(spmi_reg_read(bus, 0, 0xC0, 0x4), 0x10);
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ut_asserteq(spmi_reg_read(bus, 0, 0xC0, 0x5), 0x5);
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/* Read ID reg via pmic interface */
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ut_asserteq(pmic_reg_read(pmic, 0xC004), 0x10);
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ut_asserteq(pmic_reg_read(pmic, 0xC005), 0x5);
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return 0;
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}
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DM_TEST(dm_test_spmi_access, DM_TESTF_SCAN_FDT);
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/* Test if it's possible to access GPIO that should be in pmic */
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static int dm_test_spmi_access_peripheral(struct unit_test_state *uts)
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{
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struct udevice *dev;
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unsigned int offset, gpio;
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const char *name;
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int offset_count;
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/* Get second pin of PMIC GPIO */
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ut_assertok(gpio_lookup_name("spmi1", &dev, &offset, &gpio));
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/* Check if PMIC is parent */
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ut_asserteq(device_get_uclass_id(dev->parent), UCLASS_PMIC);
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/* This should be second gpio */
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ut_asserteq(1, offset);
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name = gpio_get_bank_info(dev, &offset_count);
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/* Check bank name */
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ut_asserteq_str("spmi", name);
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/* Check pin count */
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ut_asserteq(4, offset_count);
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ut_assertok(gpio_request(gpio, "testing"));
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/* Try to set/clear gpio */
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ut_assertok(gpio_direction_output(gpio, 0));
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ut_asserteq(gpio_get_value(gpio), 0);
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ut_assertok(gpio_direction_output(gpio, 1));
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ut_asserteq(gpio_get_value(gpio), 1);
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ut_assertok(gpio_direction_input(gpio));
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ut_asserteq(gpio_get_value(gpio), 1);
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ut_assertok(gpio_free(gpio));
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return 0;
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}
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DM_TEST(dm_test_spmi_access_peripheral, DM_TESTF_SCAN_FDT);
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