upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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156 lines
4.1 KiB
156 lines
4.1 KiB
/*
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* Aquantia PHY drivers
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*/
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#include <config.h>
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#include <common.h>
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#include <phy.h>
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#ifndef CONFIG_PHYLIB_10G
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#error The Aquantia PHY needs 10G support
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#endif
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#define AQUNTIA_10G_CTL 0x20
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#define AQUNTIA_VENDOR_P1 0xc400
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#define AQUNTIA_SPEED_LSB_MASK 0x2000
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#define AQUNTIA_SPEED_MSB_MASK 0x40
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int aquantia_config(struct phy_device *phydev)
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{
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u32 val = phy_read(phydev, MDIO_MMD_PMAPMD, MII_BMCR);
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if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
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/* 1000BASE-T mode */
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phydev->advertising = SUPPORTED_1000baseT_Full;
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phydev->supported = phydev->advertising;
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val = (val & ~AQUNTIA_SPEED_LSB_MASK) | AQUNTIA_SPEED_MSB_MASK;
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phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR, val);
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} else if (phydev->interface == PHY_INTERFACE_MODE_XGMII) {
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/* 10GBASE-T mode */
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phydev->advertising = SUPPORTED_10000baseT_Full;
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phydev->supported = phydev->advertising;
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if (!(val & AQUNTIA_SPEED_LSB_MASK) ||
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!(val & AQUNTIA_SPEED_MSB_MASK))
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phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR,
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AQUNTIA_SPEED_LSB_MASK |
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AQUNTIA_SPEED_MSB_MASK);
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} else if (phydev->interface == PHY_INTERFACE_MODE_SGMII_2500) {
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/* 2.5GBASE-T mode */
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phydev->advertising = SUPPORTED_1000baseT_Full;
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phydev->supported = phydev->advertising;
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phy_write(phydev, MDIO_MMD_AN, AQUNTIA_10G_CTL, 1);
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phy_write(phydev, MDIO_MMD_AN, AQUNTIA_VENDOR_P1, 0x9440);
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} else if (phydev->interface == PHY_INTERFACE_MODE_MII) {
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/* 100BASE-TX mode */
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phydev->advertising = SUPPORTED_100baseT_Full;
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phydev->supported = phydev->advertising;
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val = (val & ~AQUNTIA_SPEED_MSB_MASK) | AQUNTIA_SPEED_LSB_MASK;
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phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR, val);
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}
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return 0;
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}
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int aquantia_startup(struct phy_device *phydev)
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{
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u32 reg, speed;
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int i = 0;
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phydev->duplex = DUPLEX_FULL;
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/* if the AN is still in progress, wait till timeout. */
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phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
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reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
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if (!(reg & MDIO_AN_STAT1_COMPLETE)) {
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printf("%s Waiting for PHY auto negotiation to complete",
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phydev->dev->name);
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do {
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udelay(1000);
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reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
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if ((i++ % 500) == 0)
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printf(".");
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} while (!(reg & MDIO_AN_STAT1_COMPLETE) &&
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i < (4 * PHY_ANEG_TIMEOUT));
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if (i > PHY_ANEG_TIMEOUT)
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printf(" TIMEOUT !\n");
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}
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/* Read twice because link state is latched and a
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* read moves the current state into the register */
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phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
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reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
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if (reg < 0 || !(reg & MDIO_STAT1_LSTATUS))
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phydev->link = 0;
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else
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phydev->link = 1;
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speed = phy_read(phydev, MDIO_MMD_PMAPMD, MII_BMCR);
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if (speed & AQUNTIA_SPEED_MSB_MASK) {
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if (speed & AQUNTIA_SPEED_LSB_MASK)
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phydev->speed = SPEED_10000;
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else
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phydev->speed = SPEED_1000;
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} else {
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if (speed & AQUNTIA_SPEED_LSB_MASK)
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phydev->speed = SPEED_100;
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else
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phydev->speed = SPEED_10;
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}
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return 0;
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}
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struct phy_driver aq1202_driver = {
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.name = "Aquantia AQ1202",
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.uid = 0x3a1b445,
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.mask = 0xfffffff0,
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.features = PHY_10G_FEATURES,
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.mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
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MDIO_MMD_PHYXS | MDIO_MMD_AN |
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MDIO_MMD_VEND1),
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.config = &aquantia_config,
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.startup = &aquantia_startup,
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.shutdown = &gen10g_shutdown,
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};
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struct phy_driver aq2104_driver = {
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.name = "Aquantia AQ2104",
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.uid = 0x3a1b460,
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.mask = 0xfffffff0,
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.features = PHY_10G_FEATURES,
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.mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
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MDIO_MMD_PHYXS | MDIO_MMD_AN |
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MDIO_MMD_VEND1),
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.config = &aquantia_config,
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.startup = &aquantia_startup,
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.shutdown = &gen10g_shutdown,
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};
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struct phy_driver aqr105_driver = {
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.name = "Aquantia AQR105",
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.uid = 0x3a1b4a2,
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.mask = 0xfffffff0,
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.features = PHY_10G_FEATURES,
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.mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
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MDIO_MMD_PHYXS | MDIO_MMD_AN |
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MDIO_MMD_VEND1),
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.config = &aquantia_config,
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.startup = &aquantia_startup,
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.shutdown = &gen10g_shutdown,
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};
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int phy_aquantia_init(void)
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{
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phy_register(&aq1202_driver);
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phy_register(&aq2104_driver);
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phy_register(&aqr105_driver);
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return 0;
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}
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