upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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165 lines
4.4 KiB
165 lines
4.4 KiB
/*
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* include/configs/alt.h
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* This file is alt board configuration.
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef __ALT_H
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#define __ALT_H
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#undef DEBUG
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#define CONFIG_ARMV7
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#define CONFIG_R8A7794
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#define CONFIG_RMOBILE_BOARD_STRING "Alt"
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#define CONFIG_SH_GPIO_PFC
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#include <asm/arch/rmobile.h>
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#define CONFIG_CMD_EDITENV
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_DFL
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#define CONFIG_CMD_SDRAM
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#define CONFIG_CMD_RUN
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#define CONFIG_CMD_LOADS
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_SPI
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#define CONFIG_SYS_TEXT_BASE 0xE6304000
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#define CONFIG_SYS_THUMB_BUILD
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#define CONFIG_SYS_GENERIC_BOARD
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_OF_LIBFDT
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#define BOARD_LATE_INIT
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#define CONFIG_BAUDRATE 38400
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS ""
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#define CONFIG_VERSION_VARIABLE
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#undef CONFIG_SHOW_BOOT_PROGRESS
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_TMU_TIMER
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#define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
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#define STACK_AREA_SIZE 0xC000
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#define LOW_LEVEL_MERAM_STACK \
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(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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#define ALT_SDRAM_BASE 0x40000000
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#define ALT_SDRAM_SIZE (1024u * 1024 * 1024)
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#define ALT_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE 512
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#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 }
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/* SCIF */
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#define CONFIG_SCIF_CONSOLE
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#define CONFIG_CONS_SCIF2
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#undef CONFIG_SYS_CONSOLE_INFO_QUIET
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#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
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#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
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#define CONFIG_SYS_MEMTEST_START (ALT_SDRAM_BASE)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
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504 * 1024 * 1024)
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#undef CONFIG_SYS_ALT_MEMTEST
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#undef CONFIG_SYS_MEMTEST_SCRATCH
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE
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#define CONFIG_SYS_SDRAM_BASE (ALT_SDRAM_BASE)
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#define CONFIG_SYS_SDRAM_SIZE (ALT_UBOOT_SDRAM_SIZE)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0)
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
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#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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/* FLASH */
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#define CONFIG_SPI
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#define CONFIG_SPI_FLASH_BAR
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#define CONFIG_SH_QSPI
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_SPANSION
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#define CONFIG_SPI_FLASH_QUAD
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#define CONFIG_SYS_NO_FLASH
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/* ENV setting */
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_SECT_SIZE (256 * 1024)
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#define CONFIG_ENV_ADDR 0xC0000
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
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#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootm_low=0x40e00000\0" \
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"bootm_size=0x100000\0" \
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/* SH Ether */
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#define CONFIG_NET_MULTI
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#define CONFIG_SH_ETHER
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 0x1
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
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#define CONFIG_SH_ETHER_CACHE_WRITEBACK
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#define CONFIG_SH_ETHER_CACHE_INVALIDATE
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#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
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#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
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#define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24)
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_P_CLK_FREQ
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#define CONFIG_SYS_TMU_CLK_DIV 4
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/* i2c */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_SH
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
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#define CONFIG_SYS_I2C_SH_BASE0 0xE6500000
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#define CONFIG_SYS_I2C_SH_SPEED0 400000
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#define CONFIG_SYS_I2C_SH_BASE1 0xE6510000
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#define CONFIG_SYS_I2C_SH_SPEED1 400000
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#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
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#define CONFIG_SYS_I2C_SH_SPEED2 400000
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#define CONFIG_SH_I2C_DATA_HIGH 4
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#define CONFIG_SH_I2C_DATA_LOW 5
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#define CONFIG_SH_I2C_CLOCK 10000000
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#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
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#endif /* __ALT_H */
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