upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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53 lines
1.7 KiB
53 lines
1.7 KiB
/*
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* Copyright (C) 2010 Samsung Electronics
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* Naveen Krishna Ch <ch.naveen@samsung.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/smc.h>
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/*
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* s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the
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* band width control and bank control registers
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* srom_bank - SROM Bank 0 to 5
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* smc_bw_conf - SMC Band witdh reg configuration value
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* smc_bc_conf - SMC Bank Control reg configuration value
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*/
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void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
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{
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u32 tmp;
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struct s5pc1xx_smc *srom;
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if (cpu_is_s5pc100())
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srom = (struct s5pc1xx_smc *)S5PC100_SROMC_BASE;
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else
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srom = (struct s5pc1xx_smc *)S5PC110_SROMC_BASE;
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/* Configure SMC_BW register to handle proper SROMC bank */
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tmp = srom->bw;
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tmp &= ~(0xF << (srom_bank * 4));
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tmp |= smc_bw_conf;
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srom->bw = tmp;
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/* Configure SMC_BC register */
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srom->bc[srom_bank] = smc_bc_conf;
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}
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