upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/doc/README.bus_vcxk

2.5 KiB

/*
* (C) Copyright 2008-2009
* BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
* Jens Scharsig <esw@bus-elektronik.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/

U-Boot vcxk video controller driver
======================================

By defining CONFIG_VIDEO_VCXK this driver can be used with VC2K, VC4K and
VC8K devices on following boards:

board | ARCH | Vendor
-----------------------------------------------------------------------
EB+CPU5282-T1 | MCF5282 | BuS Elektronik GmbH & Co. KG
EB+MCF-EVB123 | MCF5282 | BuS Elektronik GmbH & Co. KG
EB+CPUx9K2 | AT91RM9200 | BuS Elektronik GmbH & Co. KG
ZLSA | AT91RM9200 | Ruf Telematik AG

Driver configuration
--------------------

The driver needs some defines to describe the target hardware:

CONFIG_SYS_VCXK_BASE

base address of VCxK hardware memory

CONFIG_SYS_VCXK_DEFAULT_LINEALIGN

defines the physical alignment of a pixel row

CONFIG_SYS_VCXK_DOUBLEBUFFERED

some boards that use vcxk prevent read from framebuffer memory.
define this option to enable double buffering (needs 16KiB RAM)

CONFIG_SYS_VCXK_<xxxx>_PIN

defines the number of the I/O line PIN in the port
valid values for <xxxx> are:

ACKNOWLEDGE
describes the acknowledge line from vcxk hardware

ENABLE
describes the enable line to vcxk hardware

INVERT
describes the invert line to vcxk hardware

RESET
describes the reset line to vcxk hardware

REQUEST
describes the request line to vcxk hardware

CONFIG_SYS_VCXK_<xxxx>_PORT

defines the I/O port which is connected with the line
for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN

CONFIG_SYS_VCXK_<xxxx>_DDR

defines the register which configures the direction
for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN