upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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59 lines
1.4 KiB
59 lines
1.4 KiB
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/mmu.h>
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#include <linux/log2.h>
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int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
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{
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immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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law83xx_t *ecm = &immap->sysconf.ddrlaw[0];
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u64 start_align, law_sz;
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int law_sz_enc;
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if (start == 0)
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start_align = 1ull << (LAW_SIZE_2G + 1);
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else
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start_align = 1ull << (__ffs64(start));
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law_sz = min(start_align, sz);
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law_sz_enc = __ilog2_u64(law_sz) - 1;
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/*
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* Set up LAWBAR for all of DDR.
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*/
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ecm->bar = start & 0xfffff000;
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ecm->ar = (LAWAR_EN | (id << 20) | (LAWAR_SIZE & law_sz_enc));
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debug("DDR:bar=0x%08x\n", ecm->bar);
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debug("DDR:ar=0x%08x\n", ecm->ar);
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/* recalculate size based on what was actually covered by the law */
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law_sz = 1ull << __ilog2_u64(law_sz);
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/* do we still have anything to map */
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sz = sz - law_sz;
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if (sz) {
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start += law_sz;
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start_align = 1ull << (__ffs64(start));
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law_sz = min(start_align, sz);
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law_sz_enc = __ilog2_u64(law_sz) - 1;
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ecm = &immap->sysconf.ddrlaw[1];
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ecm->bar = start & 0xfffff000;
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ecm->ar = (LAWAR_EN | (id << 20) | (LAWAR_SIZE & law_sz_enc));
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debug("DDR:bar=0x%08x\n", ecm->bar);
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debug("DDR:ar=0x%08x\n", ecm->ar);
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} else {
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return 0;
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}
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/* do we still have anything to map */
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sz = sz - law_sz;
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if (sz)
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return 1;
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return 0;
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}
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