upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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333 lines
8.2 KiB
333 lines
8.2 KiB
/*
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* Copyright 2013 Texas Instruments, Inc.
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* Author: Dan Murphy <dmurphy@ti.com>
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*
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* Derived work from the pca953x.c driver
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <i2c.h>
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#include <tca642x.h>
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/* tca642x register address definitions */
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struct tca642x_bank_info tca642x_regs[] = {
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{ .input_reg = 0x00,
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.output_reg = 0x04,
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.polarity_reg = 0x08,
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.configuration_reg = 0x0c },
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{ .input_reg = 0x01,
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.output_reg = 0x05,
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.polarity_reg = 0x09,
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.configuration_reg = 0x0d },
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{ .input_reg = 0x02,
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.output_reg = 0x06,
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.polarity_reg = 0x0a,
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.configuration_reg = 0x0e },
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};
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/*
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* Modify masked bits in register
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*/
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static int tca642x_reg_write(uchar chip, uint8_t addr,
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uint8_t reg_bit, uint8_t data)
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{
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uint8_t valw;
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int org_bus_num;
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int ret;
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org_bus_num = i2c_get_bus_num();
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i2c_set_bus_num(CONFIG_SYS_I2C_TCA642X_BUS_NUM);
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if (i2c_read(chip, addr, 1, (uint8_t *)&valw, 1)) {
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printf("Could not read before writing\n");
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ret = -1;
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goto error;
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}
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valw &= ~reg_bit;
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valw |= data;
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ret = i2c_write(chip, addr, 1, (u8 *)&valw, 1);
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error:
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i2c_set_bus_num(org_bus_num);
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return ret;
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}
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static int tca642x_reg_read(uchar chip, uint8_t addr, uint8_t *data)
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{
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uint8_t valw;
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int org_bus_num;
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int ret = 0;
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org_bus_num = i2c_get_bus_num();
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i2c_set_bus_num(CONFIG_SYS_I2C_TCA642X_BUS_NUM);
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if (i2c_read(chip, addr, 1, (u8 *)&valw, 1)) {
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ret = -1;
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goto error;
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}
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*data = valw;
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error:
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i2c_set_bus_num(org_bus_num);
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return ret;
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}
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/*
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* Set output value of IO pins in 'reg_bit' to corresponding value in 'data'
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* 0 = low, 1 = high
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*/
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int tca642x_set_val(uchar chip, uint8_t gpio_bank,
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uint8_t reg_bit, uint8_t data)
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{
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uint8_t out_reg = tca642x_regs[gpio_bank].output_reg;
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return tca642x_reg_write(chip, out_reg, reg_bit, data);
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}
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/*
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* Set read polarity of IO pins in 'reg_bit' to corresponding value in 'data'
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* 0 = read pin value, 1 = read inverted pin value
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*/
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int tca642x_set_pol(uchar chip, uint8_t gpio_bank,
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uint8_t reg_bit, uint8_t data)
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{
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uint8_t pol_reg = tca642x_regs[gpio_bank].polarity_reg;
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return tca642x_reg_write(chip, pol_reg, reg_bit, data);
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}
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/*
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* Set direction of IO pins in 'reg_bit' to corresponding value in 'data'
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* 0 = output, 1 = input
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*/
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int tca642x_set_dir(uchar chip, uint8_t gpio_bank,
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uint8_t reg_bit, uint8_t data)
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{
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uint8_t config_reg = tca642x_regs[gpio_bank].configuration_reg;
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return tca642x_reg_write(chip, config_reg, reg_bit, data);
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}
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/*
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* Read current logic level of all IO pins
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*/
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int tca642x_get_val(uchar chip, uint8_t gpio_bank)
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{
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uint8_t val;
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uint8_t in_reg = tca642x_regs[gpio_bank].input_reg;
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if (tca642x_reg_read(chip, in_reg, &val) < 0)
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return -1;
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return (int)val;
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}
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/*
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* Set the inital register states for the tca642x gpio expander
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*/
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int tca642x_set_inital_state(uchar chip, struct tca642x_bank_info init_data[])
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{
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int i, ret;
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uint8_t config_reg;
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uint8_t polarity_reg;
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uint8_t output_reg;
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for (i = 0; i < 3; i++) {
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config_reg = tca642x_regs[i].configuration_reg;
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ret = tca642x_reg_write(chip, config_reg, 0xff,
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init_data[i].configuration_reg);
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polarity_reg = tca642x_regs[i].polarity_reg;
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ret = tca642x_reg_write(chip, polarity_reg, 0xff,
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init_data[i].polarity_reg);
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output_reg = tca642x_regs[i].output_reg;
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ret = tca642x_reg_write(chip, output_reg, 0xff,
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init_data[i].output_reg);
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}
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return ret;
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}
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#if defined(CONFIG_CMD_TCA642X) && !defined(CONFIG_SPL_BUILD)
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/*
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* Display tca642x information
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*/
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static int tca642x_info(uchar chip)
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{
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int i, j;
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uint8_t data;
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printf("tca642x@ 0x%x (%d pins):\n", chip, 24);
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for (i = 0; i < 3; i++) {
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printf("Bank %i\n", i);
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if (tca642x_reg_read(chip,
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tca642x_regs[i].configuration_reg,
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&data) < 0)
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return -1;
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printf("\tConfiguration: ");
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for (j = 7; j >= 0; j--)
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printf("%c", data & (1 << j) ? 'i' : 'o');
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printf("\n");
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if (tca642x_reg_read(chip,
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tca642x_regs[i].polarity_reg, &data) < 0)
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return -1;
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printf("\tPolarity: ");
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for (j = 7; j >= 0; j--)
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printf("%c", data & (1 << j) ? '1' : '0');
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printf("\n");
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if (tca642x_reg_read(chip,
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tca642x_regs[i].input_reg, &data) < 0)
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return -1;
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printf("\tInput value: ");
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for (j = 7; j >= 0; j--)
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printf("%c", data & (1 << j) ? '1' : '0');
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printf("\n");
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if (tca642x_reg_read(chip,
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tca642x_regs[i].output_reg, &data) < 0)
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return -1;
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printf("\tOutput value: ");
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for (j = 7; j >= 0; j--)
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printf("%c", data & (1 << j) ? '1' : '0');
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printf("\n");
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}
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return 0;
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}
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static cmd_tbl_t cmd_tca642x[] = {
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U_BOOT_CMD_MKENT(device, 3, 0, (void *)TCA642X_CMD_DEVICE, "", ""),
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U_BOOT_CMD_MKENT(output, 4, 0, (void *)TCA642X_CMD_OUTPUT, "", ""),
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U_BOOT_CMD_MKENT(input, 3, 0, (void *)TCA642X_CMD_INPUT, "", ""),
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U_BOOT_CMD_MKENT(invert, 4, 0, (void *)TCA642X_CMD_INVERT, "", ""),
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U_BOOT_CMD_MKENT(info, 2, 0, (void *)TCA642X_CMD_INFO, "", ""),
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};
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static int do_tca642x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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static uchar chip = CONFIG_SYS_I2C_TCA642X_ADDR;
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int ret = CMD_RET_USAGE, val;
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uint8_t gpio_bank = 0;
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uint8_t bank_shift;
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ulong ul_arg2 = 0;
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ulong ul_arg3 = 0;
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cmd_tbl_t *c;
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c = find_cmd_tbl(argv[1], cmd_tca642x, ARRAY_SIZE(cmd_tca642x));
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/* All commands but "device" require 'maxargs' arguments */
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if (!c ||
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!((argc == (c->maxargs)) ||
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(((int)c->cmd == TCA642X_CMD_DEVICE) &&
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(argc == (c->maxargs - 1))))) {
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return CMD_RET_USAGE;
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}
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/* arg2 used as chip number or pin number */
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if (argc > 2)
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ul_arg2 = simple_strtoul(argv[2], NULL, 10);
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/* arg3 used as pin or invert value */
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if (argc > 3) {
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ul_arg3 = simple_strtoul(argv[3], NULL, 10) & 0x1;
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if (ul_arg2 <= 7) {
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gpio_bank = 0;
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} else if ((ul_arg2 >= 10) && (ul_arg2 <= 17)) {
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gpio_bank = 1;
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} else if ((ul_arg2 >= 20) && (ul_arg2 <= 27)) {
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gpio_bank = 2;
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} else {
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printf("Requested pin is not available\n");
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ret = CMD_RET_FAILURE;
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goto error;
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}
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}
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switch ((int)c->cmd) {
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case TCA642X_CMD_INFO:
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ret = tca642x_info(chip);
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if (ret)
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ret = CMD_RET_FAILURE;
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break;
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case TCA642X_CMD_DEVICE:
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if (argc == 3)
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chip = (uint8_t)ul_arg2;
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printf("Current device address: 0x%x\n", chip);
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ret = CMD_RET_SUCCESS;
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break;
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case TCA642X_CMD_INPUT:
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bank_shift = ul_arg2 - (gpio_bank * 10);
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ret = tca642x_set_dir(chip, gpio_bank, (1 << bank_shift),
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TCA642X_DIR_IN << bank_shift);
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val = (tca642x_get_val(chip, gpio_bank) &
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(1 << bank_shift)) != 0;
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if (ret)
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ret = CMD_RET_FAILURE;
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else
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printf("chip 0x%02x, pin 0x%lx = %d\n", chip,
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ul_arg2, val);
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break;
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case TCA642X_CMD_OUTPUT:
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bank_shift = ul_arg2 - (gpio_bank * 10);
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ret = tca642x_set_dir(chip, gpio_bank, (1 << bank_shift),
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(TCA642X_DIR_OUT << bank_shift));
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if (!ret)
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ret = tca642x_set_val(chip,
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gpio_bank, (1 << bank_shift),
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(ul_arg3 << bank_shift));
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if (ret)
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ret = CMD_RET_FAILURE;
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break;
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case TCA642X_CMD_INVERT:
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bank_shift = ul_arg2 - (gpio_bank * 10);
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ret = tca642x_set_pol(chip, gpio_bank, (1 << bank_shift),
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(ul_arg3 << bank_shift));
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if (ret)
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ret = CMD_RET_FAILURE;
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break;
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}
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error:
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if (ret == CMD_RET_FAILURE)
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eprintf("Error talking to chip at 0x%x\n", chip);
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return ret;
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}
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U_BOOT_CMD(
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tca642x, 5, 1, do_tca642x,
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"tca642x gpio access",
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"device [dev]\n"
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" - show or set current device address\n"
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"tca642x info\n"
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" - display info for current chip\n"
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"tca642x output pin 0|1\n"
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" - set pin as output and drive low or high\n"
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"tca642x invert pin 0|1\n"
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" - disable/enable polarity inversion for reads\n"
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"tca642x input pin\n"
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" - set pin as input and read value"
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);
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#endif /* CONFIG_CMD_TCA642X */
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