upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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41 lines
1.7 KiB
41 lines
1.7 KiB
/*
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* blackfin-config-pre.h - common defines for Blackfin boards in config.h
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*
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* Copyright (c) 2007 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __ASM_BLACKFIN_CONFIG_PRE_H__
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#define __ASM_BLACKFIN_CONFIG_PRE_H__
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/* Misc helper functions */
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#define XMK_STR(x) #x
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#define MK_STR(x) XMK_STR(x)
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
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/* Configurable Blackfin-specific monitor commands */
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#define CONFIG_SYS_BFIN_CMD_BOOTLDR 0x01
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#define CONFIG_SYS_BFIN_CMD_CPLBINFO 0x02
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#define CONFIG_SYS_BFIN_CMD_OTP 0x04
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#define CONFIG_SYS_BFIN_CMD_CACHE_DUMP 0x08
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/* Bootmode defines -- your config needs to select this via CONFIG_BFIN_BOOT_MODE.
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* Depending on your cpu, some of these may not be valid, check your HRM.
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* The actual values here are meaningless as long as they're unique.
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*/
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#define BFIN_BOOT_BYPASS 1 /* bypass bootrom */
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#define BFIN_BOOT_PARA 2 /* boot ldr out of parallel flash */
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#define BFIN_BOOT_SPI_MASTER 3 /* boot ldr out of serial flash */
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#define BFIN_BOOT_SPI_SLAVE 4 /* boot ldr as spi slave */
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#define BFIN_BOOT_TWI_MASTER 5 /* boot ldr over twi device */
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#define BFIN_BOOT_TWI_SLAVE 6 /* boot ldr over twi slave */
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#define BFIN_BOOT_UART 7 /* boot ldr over uart */
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#define BFIN_BOOT_IDLE 8 /* do nothing, just idle */
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#define BFIN_BOOT_FIFO 9 /* boot ldr out of FIFO */
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#define BFIN_BOOT_MEM 10 /* boot ldr out of memory (warmboot) */
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#define BFIN_BOOT_16HOST_DMA 11 /* boot ldr from 16-bit host dma */
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#define BFIN_BOOT_8HOST_DMA 12 /* boot ldr from 8-bit host dma */
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#define BFIN_BOOT_NAND 13 /* boot ldr from nand flash */
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#endif
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