upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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93 lines
1.6 KiB
93 lines
1.6 KiB
/*
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* TNETV107X: Timer implementation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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struct timer_regs {
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u_int32_t pid12;
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u_int32_t pad[3];
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u_int32_t tim12;
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u_int32_t tim34;
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u_int32_t prd12;
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u_int32_t prd34;
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u_int32_t tcr;
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u_int32_t tgcr;
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u_int32_t wdtcr;
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};
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#define regs ((struct timer_regs *)CONFIG_SYS_TIMERBASE)
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#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
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#define TIM_CLK_DIV 16
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static ulong timestamp;
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static ulong lastinc;
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int timer_init(void)
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{
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clk_enable(TNETV107X_LPSC_TIMER0);
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lastinc = timestamp = 0;
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/* We are using timer34 in unchained 32-bit mode, full speed */
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__raw_writel(0x0, ®s->tcr);
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__raw_writel(0x0, ®s->tgcr);
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__raw_writel(0x06 | ((TIM_CLK_DIV - 1) << 8), ®s->tgcr);
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__raw_writel(0x0, ®s->tim34);
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__raw_writel(TIMER_LOAD_VAL, ®s->prd34);
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__raw_writel(2 << 22, ®s->tcr);
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return 0;
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}
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static ulong get_timer_raw(void)
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{
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ulong now = __raw_readl(®s->tim34);
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if (now >= lastinc)
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timestamp += now - lastinc;
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else
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timestamp += now + TIMER_LOAD_VAL - lastinc;
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lastinc = now;
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return timestamp;
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}
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ulong get_timer(ulong base)
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{
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return (get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base;
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}
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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void __udelay(unsigned long usec)
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{
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ulong tmo;
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ulong endtime;
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signed long diff;
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tmo = CONFIG_SYS_HZ_CLOCK / 1000;
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tmo *= usec;
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tmo /= (1000 * TIM_CLK_DIV);
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endtime = get_timer_raw() + tmo;
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do {
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ulong now = get_timer_raw();
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diff = endtime - now;
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} while (diff >= 0);
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}
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ulong get_tbclk(void)
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{
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return CONFIG_SYS_HZ;
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}
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