upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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103 lines
2.6 KiB
103 lines
2.6 KiB
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/gpio.h>
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/*
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* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
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* peripheral pins. Good to have if hardware is soldered optionally
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* or in case of SPI no slave is selected. Avoid lines to float
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* needlessly. Use a short local PUP define.
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*
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* Due to errata "TXD floats when CTS is inactive" pullups are always
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* on for TXD pins.
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*/
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#ifdef CONFIG_AT91_GPIO_PULLUP
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# define PUP CONFIG_AT91_GPIO_PULLUP
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#else
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# define PUP 0
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#endif
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void at91_serial0_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* TXD0 */
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at91_set_a_periph(AT91_PIO_PORTA, 7, PUP); /* RXD0 */
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writel(1 << ATMEL_ID_USART0, &pmc->pcer);
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}
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void at91_serial1_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* TXD1 */
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at91_set_a_periph(AT91_PIO_PORTA, 12, PUP); /* RXD1 */
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writel(1 << ATMEL_ID_USART1, &pmc->pcer);
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}
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void at91_serial2_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* TXD2 */
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at91_set_a_periph(AT91_PIO_PORTA, 14, PUP); /* RXD2 */
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writel(1 << ATMEL_ID_USART2, &pmc->pcer);
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}
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void at91_seriald_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTA, 21, PUP); /* DRXD */
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at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* DTXD */
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writel(1 << ATMEL_ID_SYS, &pmc->pcer);
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}
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#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
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void at91_spi0_hw_init(unsigned long cs_mask)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTA, 25, PUP); /* SPI0_MISO */
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at91_set_a_periph(AT91_PIO_PORTA, 26, PUP); /* SPI0_MOSI */
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at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* SPI0_SPCK */
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/* Enable clock */
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writel(1 << ATMEL_ID_SPI, &pmc->pcer);
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if (cs_mask & (1 << 0)) {
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at91_set_a_periph(AT91_PIO_PORTA, 28, 1);
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}
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if (cs_mask & (1 << 1)) {
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at91_set_b_periph(AT91_PIO_PORTB, 7, 1);
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}
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if (cs_mask & (1 << 2)) {
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at91_set_a_periph(AT91_PIO_PORTD, 8, 1);
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}
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if (cs_mask & (1 << 3)) {
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at91_set_b_periph(AT91_PIO_PORTD, 9, 1);
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}
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if (cs_mask & (1 << 4)) {
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at91_set_pio_output(AT91_PIO_PORTA, 28, 1);
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}
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if (cs_mask & (1 << 5)) {
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at91_set_pio_output(AT91_PIO_PORTB, 7, 1);
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}
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if (cs_mask & (1 << 6)) {
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at91_set_pio_output(AT91_PIO_PORTD, 8, 1);
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}
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if (cs_mask & (1 << 7)) {
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at91_set_pio_output(AT91_PIO_PORTD, 9, 1);
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}
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}
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#endif
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