upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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48 lines
1.1 KiB
48 lines
1.1 KiB
/*
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* Copyright (C) 2006, 2008 Atmel Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_AVR32_ARCH_GPIO_H__
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#define __ASM_AVR32_ARCH_GPIO_H__
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#include <asm/arch/chip-features.h>
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#include <asm/arch/hardware.h>
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#define NR_GPIO_CONTROLLERS 5
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/*
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* Pin numbers identifying specific GPIO pins on the chip.
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*/
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#define GPIO_PIOA_BASE (0)
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#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
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#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
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#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
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#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
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#define GPIO_PIN_PA(x) (GPIO_PIOA_BASE + (x))
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#define GPIO_PIN_PB(x) (GPIO_PIOB_BASE + (x))
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#define GPIO_PIN_PC(x) (GPIO_PIOC_BASE + (x))
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#define GPIO_PIN_PD(x) (GPIO_PIOD_BASE + (x))
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#define GPIO_PIN_PE(x) (GPIO_PIOE_BASE + (x))
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static inline void *pio_pin_to_port(unsigned int pin)
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{
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switch (pin >> 5) {
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case 0:
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return (void *)ATMEL_BASE_PIOA;
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case 1:
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return (void *)ATMEL_BASE_PIOB;
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case 2:
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return (void *)ATMEL_BASE_PIOC;
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case 3:
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return (void *)ATMEL_BASE_PIOD;
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case 4:
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return (void *)ATMEL_BASE_PIOE;
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default:
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return NULL;
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}
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}
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#include <asm/arch-common/portmux-pio.h>
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#endif /* __ASM_AVR32_ARCH_GPIO_H__ */
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