upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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144 lines
2.9 KiB
144 lines
2.9 KiB
/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/nios2.h>
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#include <asm/types.h>
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#include <asm/io.h>
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#include <asm/ptrace.h>
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/*************************************************************************/
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struct irq_action {
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interrupt_handler_t *handler;
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void *arg;
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int count;
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};
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static struct irq_action vecs[32];
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int disable_interrupts (void)
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{
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int val = rdctl (CTL_STATUS);
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wrctl (CTL_STATUS, val & ~STATUS_IE);
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return (val & STATUS_IE);
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}
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void enable_interrupts( void )
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{
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int val = rdctl (CTL_STATUS);
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wrctl (CTL_STATUS, val | STATUS_IE);
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}
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void external_interrupt (struct pt_regs *regs)
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{
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unsigned irqs;
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struct irq_action *act;
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/* Evaluate only irqs that are both enabled AND pending */
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irqs = rdctl (CTL_IENABLE) & rdctl (CTL_IPENDING);
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act = vecs;
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/* Assume (as does the Nios2 HAL) that bit 0 is highest
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* priority. NOTE: There is ALWAYS a handler assigned
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* (the default if no other).
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*/
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while (irqs) {
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if (irqs & 1) {
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act->handler (act->arg);
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act->count++;
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}
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irqs >>=1;
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act++;
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}
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}
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static void def_hdlr (void *arg)
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{
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unsigned irqs = rdctl (CTL_IENABLE);
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/* Disable the individual interrupt -- with gratuitous
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* warning.
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*/
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irqs &= ~(1 << (int)arg);
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wrctl (CTL_IENABLE, irqs);
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printf ("WARNING: Disabling unhandled interrupt: %d\n",
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(int)arg);
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}
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/*************************************************************************/
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void irq_install_handler (int irq, interrupt_handler_t *hdlr, void *arg)
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{
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int flag;
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struct irq_action *act;
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unsigned ena = rdctl (CTL_IENABLE);
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if ((irq < 0) || (irq > 31))
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return;
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act = &vecs[irq];
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flag = disable_interrupts ();
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if (hdlr) {
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act->handler = hdlr;
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act->arg = arg;
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ena |= (1 << irq); /* enable */
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} else {
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act->handler = def_hdlr;
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act->arg = (void *)irq;
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ena &= ~(1 << irq); /* disable */
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}
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wrctl (CTL_IENABLE, ena);
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if (flag) enable_interrupts ();
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}
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int interrupt_init (void)
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{
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int i;
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/* Assign the default handler to all */
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for (i = 0; i < 32; i++) {
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vecs[i].handler = def_hdlr;
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vecs[i].arg = (void *)i;
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vecs[i].count = 0;
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}
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enable_interrupts ();
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return (0);
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}
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/*************************************************************************/
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#if defined(CONFIG_CMD_IRQ)
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int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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int i;
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struct irq_action *act = vecs;
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printf ("\nInterrupt-Information:\n\n");
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printf ("Nr Routine Arg Count\n");
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printf ("-----------------------------\n");
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for (i=0; i<32; i++) {
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if (act->handler != def_hdlr) {
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printf ("%02d %08lx %08lx %d\n",
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i,
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(ulong)act->handler,
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(ulong)act->arg,
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act->count);
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}
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act++;
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}
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printf ("\n");
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return (0);
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}
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#endif
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