upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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93 lines
2.8 KiB
93 lines
2.8 KiB
/* SPARC I/O definitions
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*
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* (C) Copyright 2007
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* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef _SPARC_IO_H
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#define _SPARC_IO_H
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/* Nothing to sync, total store ordering (TSO)... */
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#define sync()
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/* Forces a cache miss on read/load.
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* On some architectures we need to bypass the cache when reading
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* I/O registers so that we are not reading the same status word
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* over and over again resulting in a hang (until an IRQ if lucky)
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*
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*/
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#ifndef CFG_HAS_NO_CACHE
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#define READ_BYTE(var) SPARC_NOCACHE_READ_BYTE((unsigned int)(var))
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#define READ_HWORD(var) SPARC_NOCACHE_READ_HWORD((unsigned int)(var))
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#define READ_WORD(var) SPARC_NOCACHE_READ((unsigned int)(var))
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#define READ_DWORD(var) SPARC_NOCACHE_READ_DWORD((unsigned int)(var))
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#else
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#define READ_BYTE(var) (var)
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#define READ_HWORD(var) (var)
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#define READ_WORD(var) (var)
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#define READ_DWORD(var) (var)
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#endif
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/*
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* Generic virtual read/write.
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*/
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#define __arch_getb(a) (READ_BYTE(a))
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#define __arch_getw(a) (READ_HWORD(a))
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#define __arch_getl(a) (READ_WORD(a))
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#define __arch_getq(a) (READ_DWORD(a))
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#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
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#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
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#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
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#define __raw_writeb(v,a) __arch_putb(v,a)
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#define __raw_writew(v,a) __arch_putw(v,a)
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#define __raw_writel(v,a) __arch_putl(v,a)
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#define __raw_readb(a) __arch_getb(a)
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#define __raw_readw(a) __arch_getw(a)
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#define __raw_readl(a) __arch_getl(a)
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#define __raw_readq(a) __arch_getq(a)
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/*
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* Given a physical address and a length, return a virtual address
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* that can be used to access the memory range with the caching
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* properties specified by "flags".
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*/
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#define MAP_NOCACHE (0)
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#define MAP_WRCOMBINE (0)
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#define MAP_WRBACK (0)
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#define MAP_WRTHROUGH (0)
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static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
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unsigned long flags)
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{
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return (void *)paddr;
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}
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/*
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* Take down a mapping set up by map_physmem().
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*/
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static inline void unmap_physmem(void *vaddr, unsigned long flags)
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{
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}
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#endif
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