upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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245 lines
5.6 KiB
245 lines
5.6 KiB
/*
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* Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
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* Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il>
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*
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* Authors: Jana Rapava <fermata7@gmail.com>
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* Igor Grinberg <grinberg@compulab.co.il>
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*
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* Based on:
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* linux/drivers/usb/otg/ulpi.c
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* Generic ULPI USB transceiver support
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*
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* Original Copyright follow:
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* Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
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*
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* Based on sources from
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*
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* Sascha Hauer <s.hauer@pengutronix.de>
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* Freescale Semiconductors
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <exports.h>
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#include <usb/ulpi.h>
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#define ULPI_ID_REGS_COUNT 4
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#define ULPI_TEST_VALUE 0x55 /* 0x55 == 0b01010101 */
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static struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
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static int ulpi_integrity_check(struct ulpi_viewport *ulpi_vp)
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{
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u32 val, tval = ULPI_TEST_VALUE;
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int err, i;
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/* Use the 'special' test value to check all bits */
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for (i = 0; i < 2; i++, tval <<= 1) {
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err = ulpi_write(ulpi_vp, &ulpi->scratch, tval);
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if (err)
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return err;
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val = ulpi_read(ulpi_vp, &ulpi->scratch);
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if (val != tval) {
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printf("ULPI integrity check failed\n");
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return val;
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}
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}
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return 0;
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}
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int ulpi_init(struct ulpi_viewport *ulpi_vp)
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{
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u32 val, id = 0;
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u8 *reg = &ulpi->product_id_high;
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int i;
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/* Assemble ID from four ULPI ID registers (8 bits each). */
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for (i = 0; i < ULPI_ID_REGS_COUNT; i++) {
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val = ulpi_read(ulpi_vp, reg - i);
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if (val == ULPI_ERROR)
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return val;
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id = (id << 8) | val;
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}
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/* Split ID into vendor and product ID. */
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debug("ULPI transceiver ID 0x%04x:0x%04x\n", id >> 16, id & 0xffff);
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return ulpi_integrity_check(ulpi_vp);
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}
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int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed)
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{
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u32 tspeed = ULPI_FC_FULL_SPEED;
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u32 val;
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switch (speed) {
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case ULPI_FC_HIGH_SPEED:
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case ULPI_FC_FULL_SPEED:
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case ULPI_FC_LOW_SPEED:
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case ULPI_FC_FS4LS:
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tspeed = speed;
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break;
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default:
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printf("ULPI: %s: wrong transceiver speed specified: %u, "
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"falling back to full speed\n", __func__, speed);
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}
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val = ulpi_read(ulpi_vp, &ulpi->function_ctrl);
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if (val == ULPI_ERROR)
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return val;
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/* clear the previous speed setting */
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val = (val & ~ULPI_FC_XCVRSEL_MASK) | tspeed;
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return ulpi_write(ulpi_vp, &ulpi->function_ctrl, val);
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}
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int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp, int on, int ext_power)
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{
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u32 flags = ULPI_OTG_DRVVBUS;
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u8 *reg = on ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear;
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if (ext_power)
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flags |= ULPI_OTG_DRVVBUS_EXT;
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return ulpi_write(ulpi_vp, reg, flags);
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}
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int ulpi_set_vbus_indicator(struct ulpi_viewport *ulpi_vp, int external,
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int passthu, int complement)
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{
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u32 flags, val;
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u8 *reg;
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reg = external ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear;
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val = ulpi_write(ulpi_vp, reg, ULPI_OTG_EXTVBUSIND);
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if (val)
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return val;
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flags = passthu ? ULPI_IFACE_PASSTHRU : 0;
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flags |= complement ? ULPI_IFACE_EXTVBUS_COMPLEMENT : 0;
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val = ulpi_read(ulpi_vp, &ulpi->iface_ctrl);
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if (val == ULPI_ERROR)
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return val;
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val = val & ~(ULPI_IFACE_PASSTHRU & ULPI_IFACE_EXTVBUS_COMPLEMENT);
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val |= flags;
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val = ulpi_write(ulpi_vp, &ulpi->iface_ctrl, val);
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if (val)
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return val;
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return 0;
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}
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int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable)
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{
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u32 val = ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN;
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u8 *reg = enable ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear;
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return ulpi_write(ulpi_vp, reg, val);
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}
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int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode)
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{
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u32 topmode = ULPI_FC_OPMODE_NORMAL;
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u32 val;
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switch (opmode) {
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case ULPI_FC_OPMODE_NORMAL:
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case ULPI_FC_OPMODE_NONDRIVING:
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case ULPI_FC_OPMODE_DISABLE_NRZI:
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case ULPI_FC_OPMODE_NOSYNC_NOEOP:
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topmode = opmode;
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break;
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default:
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printf("ULPI: %s: wrong OpMode specified: %u, "
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"falling back to OpMode Normal\n", __func__, opmode);
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}
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val = ulpi_read(ulpi_vp, &ulpi->function_ctrl);
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if (val == ULPI_ERROR)
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return val;
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/* clear the previous opmode setting */
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val = (val & ~ULPI_FC_OPMODE_MASK) | topmode;
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return ulpi_write(ulpi_vp, &ulpi->function_ctrl, val);
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}
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int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode)
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{
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switch (smode) {
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case ULPI_IFACE_6_PIN_SERIAL_MODE:
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case ULPI_IFACE_3_PIN_SERIAL_MODE:
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break;
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default:
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printf("ULPI: %s: unrecognized Serial Mode specified: %u\n",
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__func__, smode);
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return ULPI_ERROR;
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}
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return ulpi_write(ulpi_vp, &ulpi->iface_ctrl_set, smode);
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}
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int ulpi_suspend(struct ulpi_viewport *ulpi_vp)
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{
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int err;
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err = ulpi_write(ulpi_vp, &ulpi->function_ctrl_clear,
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ULPI_FC_SUSPENDM);
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if (err)
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printf("ULPI: %s: failed writing the suspend bit\n", __func__);
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return err;
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}
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/*
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* Wait for ULPI PHY reset to complete.
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* Actual wait for reset must be done in a view port specific way,
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* because it involves checking the DIR line.
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*/
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static int __ulpi_reset_wait(struct ulpi_viewport *ulpi_vp)
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{
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u32 val;
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int timeout = CONFIG_USB_ULPI_TIMEOUT;
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/* Wait for the RESET bit to become zero */
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while (--timeout) {
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/*
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* This function is generic and suppose to work
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* with any viewport, so we cheat here and don't check
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* for the error of ulpi_read(), if there is one, then
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* there will be a timeout.
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*/
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val = ulpi_read(ulpi_vp, &ulpi->function_ctrl);
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if (!(val & ULPI_FC_RESET))
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return 0;
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udelay(1);
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}
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printf("ULPI: %s: reset timed out\n", __func__);
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return ULPI_ERROR;
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}
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int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp)
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__attribute__((weak, alias("__ulpi_reset_wait")));
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int ulpi_reset(struct ulpi_viewport *ulpi_vp)
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{
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int err;
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err = ulpi_write(ulpi_vp,
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&ulpi->function_ctrl_set, ULPI_FC_RESET);
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if (err) {
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printf("ULPI: %s: failed writing reset bit\n", __func__);
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return err;
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}
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return ulpi_reset_wait(ulpi_vp);
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}
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